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50f6903bd9
A single Vulkan state can map to multiple fields in different GPU
instructions. This change introduces the bottom half of a simplified
emission mechanism where we do the following :
Vulkan runtime state
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V
Intermediate driver state
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Instruction programming
This way we can detect that the intermediate state didn't change and
avoid HW instruction emission.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
248 lines
11 KiB
C
248 lines
11 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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/*
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* NOTE: The header can be included multiple times, from the same file.
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*/
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/*
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* Gen-specific function declarations. This header must *not* be included
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* directly. Instead, it is included multiple times by anv_private.h.
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*
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* In this header file, the usual genx() macro is available.
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*/
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#ifndef ANV_PRIVATE_H
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#error This file is included by means other than anv_private.h
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#endif
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struct intel_sample_positions;
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extern const uint32_t genX(vk_to_intel_cullmode)[];
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extern const uint32_t genX(vk_to_intel_front_face)[];
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extern const uint32_t genX(vk_to_intel_primitive_type)[];
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extern const uint32_t genX(vk_to_intel_compare_op)[];
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extern const uint32_t genX(vk_to_intel_stencil_op)[];
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extern const uint32_t genX(vk_to_intel_logic_op)[];
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extern const uint32_t genX(vk_to_intel_fillmode)[];
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void genX(init_physical_device_state)(struct anv_physical_device *device);
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VkResult genX(init_device_state)(struct anv_device *device);
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void genX(init_cps_device_state)(struct anv_device *device);
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void
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genX(set_fast_clear_state)(struct anv_cmd_buffer *cmd_buffer,
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const struct anv_image *image,
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const enum isl_format format,
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union isl_color_value clear_color);
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void
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genX(load_image_clear_color)(struct anv_cmd_buffer *cmd_buffer,
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struct anv_state surface_state,
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const struct anv_image *image);
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void genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_emit_gfx12_depth_wa)(struct anv_cmd_buffer *cmd_buffer,
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const struct isl_surf *surf);
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void genX(cmd_buffer_set_binding_for_gfx8_vb_flush)(struct anv_cmd_buffer *cmd_buffer,
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int vb_index,
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struct anv_address vb_address,
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uint32_t vb_size);
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void genX(cmd_buffer_update_dirty_vbs_for_gfx8_vb_flush)(struct anv_cmd_buffer *cmd_buffer,
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uint32_t access_type,
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uint64_t vb_used);
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void genX(cmd_buffer_emit_hashing_mode)(struct anv_cmd_buffer *cmd_buffer,
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unsigned width, unsigned height,
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unsigned scale);
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void genX(flush_pipeline_select_3d)(struct anv_cmd_buffer *cmd_buffer);
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void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer);
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void genX(emit_pipeline_select)(struct anv_batch *batch, uint32_t pipeline);
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void genX(apply_task_urb_workaround)(struct anv_cmd_buffer *cmd_buffer);
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void genX(emit_vertex_input)(struct anv_batch *batch,
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uint32_t *vertex_element_dws,
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struct anv_graphics_pipeline *pipeline,
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const struct vk_vertex_input_state *vi,
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bool emit_in_pipeline);
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enum anv_pipe_bits
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genX(emit_apply_pipe_flushes)(struct anv_batch *batch,
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struct anv_device *device,
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uint32_t current_pipeline,
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enum anv_pipe_bits bits,
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enum anv_pipe_bits *emitted_flush_bits);
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void genX(emit_so_memcpy_init)(struct anv_memcpy_state *state,
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struct anv_device *device,
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struct anv_batch *batch);
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void genX(emit_so_memcpy_fini)(struct anv_memcpy_state *state);
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void genX(emit_so_memcpy_end)(struct anv_memcpy_state *state);
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void genX(emit_so_memcpy)(struct anv_memcpy_state *state,
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struct anv_address dst, struct anv_address src,
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uint32_t size);
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void genX(emit_l3_config)(struct anv_batch *batch,
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const struct anv_device *device,
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const struct intel_l3_config *cfg);
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void genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
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const struct intel_l3_config *cfg);
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void genX(cmd_buffer_flush_gfx_hw_state)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_flush_gfx_runtime_state)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_flush_gfx_hw_state)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_enable_pma_fix)(struct anv_cmd_buffer *cmd_buffer,
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bool enable);
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void genX(cmd_buffer_mark_image_written)(struct anv_cmd_buffer *cmd_buffer,
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const struct anv_image *image,
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VkImageAspectFlagBits aspect,
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enum isl_aux_usage aux_usage,
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uint32_t level,
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uint32_t base_layer,
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uint32_t layer_count);
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void genX(cmd_emit_conditional_render_predicate)(struct anv_cmd_buffer *cmd_buffer);
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struct anv_state genX(cmd_buffer_ray_query_globals)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_ensure_cfe_state)(struct anv_cmd_buffer *cmd_buffer,
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uint32_t total_scratch);
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void
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genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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const struct intel_l3_config *l3_config,
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VkShaderStageFlags active_stages,
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const unsigned entry_size[4],
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enum intel_urb_deref_block_size *deref_block_size);
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void genX(emit_sample_pattern)(struct anv_batch *batch,
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const struct vk_sample_locations_state *sl);
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void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
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struct anv_address dst, struct anv_address src,
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uint32_t size);
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void genX(cmd_buffer_dispatch_kernel)(struct anv_cmd_buffer *cmd_buffer,
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struct anv_kernel *kernel,
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const uint32_t *global_size, /* NULL for indirect */
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uint32_t arg_count,
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const struct anv_kernel_arg *args);
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void genX(blorp_exec)(struct blorp_batch *batch,
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const struct blorp_params *params);
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void genX(cmd_emit_timestamp)(struct anv_batch *batch,
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struct anv_device *device,
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struct anv_address addr,
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enum anv_timestamp_capture_type type,
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void *data);
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void genX(batch_emit_dummy_post_sync_op)(struct anv_batch *batch,
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struct anv_device *device,
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uint32_t primitive_topology,
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uint32_t vertex_count);
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VkPolygonMode
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genX(raster_polygon_mode)(struct anv_graphics_pipeline *pipeline,
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VkPolygonMode polygon_mode,
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VkPrimitiveTopology primitive_topology);
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void
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genX(graphics_pipeline_emit)(struct anv_graphics_pipeline *pipeline,
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const struct vk_graphics_pipeline_state *state);
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void
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genX(compute_pipeline_emit)(struct anv_compute_pipeline *pipeline);
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void
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genX(ray_tracing_pipeline_emit)(struct anv_ray_tracing_pipeline *pipeline);
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#define anv_shader_bin_get_bsr(bin, local_arg_offset) ({ \
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assert((local_arg_offset) % 8 == 0); \
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const struct brw_bs_prog_data *prog_data = \
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brw_bs_prog_data_const(bin->prog_data); \
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assert(prog_data->simd_size == 8 || prog_data->simd_size == 16); \
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\
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(struct GENX(BINDLESS_SHADER_RECORD)) { \
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.OffsetToLocalArguments = (local_arg_offset) / 8, \
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.BindlessShaderDispatchMode = \
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prog_data->simd_size == 16 ? RT_SIMD16 : RT_SIMD8, \
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.KernelStartPointer = bin->kernel.offset, \
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}; \
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})
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void
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genX(batch_set_preemption)(struct anv_batch *batch,
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const struct intel_device_info *devinfo,
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bool value);
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void
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genX(cmd_buffer_set_preemption)(struct anv_cmd_buffer *cmd_buffer, bool value);
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void
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genX(batch_emit_pipe_control)(struct anv_batch *batch,
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const struct intel_device_info *devinfo,
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enum anv_pipe_bits bits);
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void
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genX(batch_emit_pipe_control_write)(struct anv_batch *batch,
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const struct intel_device_info *devinfo,
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uint32_t post_sync_op,
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struct anv_address address,
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uint32_t imm_data,
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enum anv_pipe_bits bits);
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void genX(batch_emit_breakpoint)(struct anv_batch *batch,
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struct anv_device *device,
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bool emit_before_draw);
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static inline void
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genX(emit_breakpoint)(struct anv_batch *batch,
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struct anv_device *device,
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bool emit_before_draw)
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{
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if (INTEL_DEBUG(DEBUG_DRAW_BKP))
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genX(batch_emit_breakpoint)(batch, device, emit_before_draw);
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}
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