mesa/src/intel/common
Kenneth Graunke 9b71709cb8 intel/decoder: Fix is_header_field starting condition.
Starting positions >= 32 are not part of the header, rather than >.

Caught by Coverity, which found that "bits <<= field->start" may shift
by 32, which has undefined behavior.

CID: 1404968

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-04-16 22:58:23 -07:00
..
gen_debug.c intel: Add a INTEL_DEBUG=color option. 2017-03-21 13:48:53 -07:00
gen_debug.h intel/common: consistently use ifndef guards over pragma once 2017-03-22 16:55:22 +00:00
gen_decoder.c intel/decoder: Fix is_header_field starting condition. 2017-04-16 22:58:23 -07:00
gen_decoder.h intel: tools: add aubinator_error_decode tool 2017-04-04 21:22:26 +01:00
gen_device_info.c i965: Allow a per gen timebase scale factor 2017-03-17 15:45:19 +00:00
gen_device_info.h i965: Allow a per gen timebase scale factor 2017-03-17 15:45:19 +00:00
gen_l3_config.c i965/l3: Add explicit way size calculation for bxt 2016-10-05 07:57:58 -07:00
gen_l3_config.h intel: Share URB configuration code between GL and Vulkan. 2016-11-19 11:40:01 -08:00
gen_sample_positions.h intel/common: use correct header guards 2016-10-14 11:53:37 +01:00
gen_urb_config.c i965: Fix a mistake from porting the URB allocation code to arrays. 2016-11-23 16:57:29 -08:00