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bdd85c8393
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33146>
104 lines
4 KiB
C
104 lines
4 KiB
C
/*
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* Copyright © 2020 Mike Blumenkrantz
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
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*/
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#include "nir.h"
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#include "nir_builder.h"
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/**
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* This pass uses the enabled clip planes from the rasterizer state to rewrite
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* vertex shader store operations and store a 0 to the corresponding gl_ClipDistance[n]
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* value if the plane is disabled
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*/
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/* vulkan (and some drivers) provides no concept of enabling clip planes through api,
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* so we rewrite disabled clip planes to a zero value in order to disable them
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*/
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static bool
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lower_clip_plane_store_io(nir_builder *b, nir_intrinsic_instr *intr,
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void *cb_data)
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{
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unsigned clip_plane_enable = *(unsigned *)cb_data;
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switch (intr->intrinsic) {
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case nir_intrinsic_store_output:
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case nir_intrinsic_store_per_primitive_output:
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case nir_intrinsic_store_per_vertex_output:
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case nir_intrinsic_store_per_view_output:
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break;
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default:
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return false;
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}
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nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
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if (sem.location != VARYING_SLOT_CLIP_DIST0 &&
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sem.location != VARYING_SLOT_CLIP_DIST1)
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return false;
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b->cursor = nir_before_instr(&intr->instr);
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nir_src *src_offset = nir_get_io_offset_src(intr);
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unsigned wrmask = nir_intrinsic_write_mask(intr);
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unsigned base_index = (sem.location == VARYING_SLOT_CLIP_DIST1 ? 4 : 0) +
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nir_intrinsic_component(intr);
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nir_def *zero = nir_imm_int(b, 0);
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if (nir_src_is_const(*src_offset)) {
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base_index += nir_src_as_uint(*src_offset) * 4;
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u_foreach_bit(bit, wrmask) {
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if (!(clip_plane_enable & BITFIELD_BIT(base_index + bit))) {
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nir_def *vec = nir_vector_insert_imm(b, intr->src[0].ssa, zero, bit);
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nir_src_rewrite(&intr->src[0], vec);
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}
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}
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} else {
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u_foreach_bit(bit, wrmask) {
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unsigned index = base_index + bit;
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nir_def *chan = nir_channel(b, intr->src[0].ssa, bit);
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nir_def *dist0 = clip_plane_enable & BITFIELD_BIT(index) ? chan : zero;
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nir_def *dist1 = clip_plane_enable & BITFIELD_BIT(index + 4) ? chan : zero;
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chan = nir_bcsel(b, nir_ieq_imm(b, src_offset->ssa, 0), dist0, dist1);
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nir_def *vec = nir_vector_insert_imm(b, intr->src[0].ssa, chan, bit);
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nir_src_rewrite(&intr->src[0], vec);
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}
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}
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return true;
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}
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bool
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nir_lower_clip_disable(nir_shader *shader, unsigned clip_plane_enable)
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{
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assert(shader->info.io_lowered);
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/* if all user planes are enabled in API that are written in the array, always ignore;
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* this explicitly covers the 2x vec4 case
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*/
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if (clip_plane_enable == u_bit_consecutive(0, shader->info.clip_distance_array_size))
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return false;
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return nir_shader_intrinsics_pass(shader, lower_clip_plane_store_io,
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nir_metadata_control_flow,
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&clip_plane_enable);
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}
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