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c590a3eadf
This mainly lets the software scoreboarding pass correctly mark the instructions, without needing to resort to fragile manual handling in the generator. We can also make small improvements. On Gfx 8LP-12.0, we no longer have the restrictions about DWord alignment, so we can simply write each half into its intended location, rather than writing it to the low DWord and then shifting it in place. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21783>
92 lines
3.3 KiB
C++
92 lines
3.3 KiB
C++
/*
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* Copyright © 2015 Connor Abbott
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "util/half_float.h"
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#include "brw_fs.h"
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#include "brw_cfg.h"
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#include "brw_fs_builder.h"
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using namespace brw;
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bool
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fs_visitor::lower_pack()
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{
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bool progress = false;
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foreach_block_and_inst_safe(block, fs_inst, inst, cfg) {
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if (inst->opcode != FS_OPCODE_PACK &&
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inst->opcode != FS_OPCODE_PACK_HALF_2x16_SPLIT)
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continue;
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assert(inst->dst.file == VGRF);
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assert(inst->saturate == false);
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fs_reg dst = inst->dst;
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const fs_builder ibld(this, block, inst);
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/* The lowering generates 2 instructions for what was previously 1. This
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* can trick the IR to believe we're doing partial writes, but the
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* register is actually fully written. Mark it as undef to help the IR
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* reduce the liveness of the register.
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*/
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if (!inst->is_partial_write())
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ibld.emit_undef_for_dst(inst);
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switch (inst->opcode) {
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case FS_OPCODE_PACK:
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for (unsigned i = 0; i < inst->sources; i++)
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ibld.MOV(subscript(dst, inst->src[i].type, i), inst->src[i]);
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break;
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case FS_OPCODE_PACK_HALF_2x16_SPLIT:
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assert(dst.type == BRW_REGISTER_TYPE_UD);
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for (unsigned i = 0; i < inst->sources; i++) {
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if (inst->src[i].file == IMM) {
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const uint32_t half = _mesa_float_to_half(inst->src[i].f);
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ibld.MOV(subscript(dst, BRW_REGISTER_TYPE_UW, i),
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brw_imm_uw(half));
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} else if (i == 1 && devinfo->ver < 9) {
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/* Pre-Skylake requires DWord aligned destinations */
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fs_reg tmp = ibld.vgrf(BRW_REGISTER_TYPE_UD);
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ibld.F32TO16(subscript(tmp, BRW_REGISTER_TYPE_HF, 0),
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inst->src[i]);
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ibld.MOV(subscript(dst, BRW_REGISTER_TYPE_UW, 1),
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subscript(tmp, BRW_REGISTER_TYPE_UW, 0));
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} else {
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ibld.F32TO16(subscript(dst, BRW_REGISTER_TYPE_HF, i),
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inst->src[i]);
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}
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}
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break;
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default:
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unreachable("skipped above");
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}
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inst->remove(block);
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progress = true;
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}
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if (progress)
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invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
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return progress;
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}
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