mesa/src/intel/common
Lionel Landwerlin d8154c4006 intel/mi_builder: fix self modifying batches
So far we only write a maximum of 4 dwords further into the batch and
it seems just going over the CS prefetch was enough.

Turns out writing more dwords can delay the writes and we start
prefetching stuff that hasn't landed in memory yet.

This fixes the issue by stalling the CS to ensure the writes have
landed before we go over the prefetch.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 796fccce63 ("intel/mi-builder: add framework for self modifying batches")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8525>
2021-01-15 13:26:23 +02:00
..
tests intel/genxml: make sure test assert are compiled in 2020-09-15 06:14:34 +00:00
gen_aux_map.c intel/common: Drop unused gen_aux_map_add_image 2020-09-09 20:02:03 +00:00
gen_aux_map.h intel/common: Drop unused gen_aux_map_add_image 2020-09-09 20:02:03 +00:00
gen_batch_decoder.c intel/tools: Decode COMPUTE_WALKER 2021-01-13 13:10:27 -08:00
gen_buffer_alloc.h intel/common: Add interface to allocate device buffers 2019-10-28 00:09:13 -07:00
gen_clflush.h intel: Fix clflushing on modern (Baytrail+) Atom CPUs. 2017-07-10 15:55:26 -07:00
gen_decoder.c intel/decoder: don't consider header fields past dword0 2020-03-18 09:19:53 +00:00
gen_decoder.h intel/compiler: Get rid of struct gen_disasm 2020-09-02 19:48:44 +00:00
gen_defines.h drm-uapi: use local files, not system libdrm 2019-02-14 11:20:00 +00:00
gen_disasm.c intel/compiler: Get rid of struct gen_disasm 2020-09-02 19:48:44 +00:00
gen_disasm.h intel/compiler: Get rid of struct gen_disasm 2020-09-02 19:48:44 +00:00
gen_gem.c intel: Move anv_gem_supports_syncobj_wait to common code. 2020-05-01 19:00:02 +00:00
gen_gem.h intel: Move anv_gem_supports_syncobj_wait to common code. 2020-05-01 19:00:02 +00:00
gen_guardband.h i965,iris: Move guardband calculations to a common location 2019-06-21 14:18:59 +00:00
gen_l3_config.c intel: Remove Gen10-specific cache config code 2020-10-15 09:29:54 -07:00
gen_l3_config.h intel/common: Return the block size from get_urb_config 2020-01-30 18:46:26 -06:00
gen_mi_builder.h intel/mi_builder: fix self modifying batches 2021-01-15 13:26:23 +02:00
gen_sample_positions.h intel: Switch the order of the 2x MSAA sample positions 2018-08-11 10:58:12 -05:00
gen_urb_config.c intel/gen12+: Reserve 4KB of URB space per bank for Compute Engine 2020-01-31 18:14:54 -08:00
gen_uuid.c intel/uuid: use git-sha1/package for the driver UUID 2020-10-07 11:11:34 +03:00
gen_uuid.h iris: plumb device/driver UUID generators 2020-10-07 11:11:28 +03:00
meson.build intel/common: Build mi_builder_test for gen 12.5 2021-01-11 13:05:49 -08:00