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mesa/src/intel/tools
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Lionel Landwerlin 792d77165b aubinator: add a custom handler for immediate register load 
Transforming this :

0x00c77084:  0x11000001:  MI_LOAD_REGISTER_IMM
0x00c77088:  0x0000b020 : Dword 1
    Register Offset: 0x0000b020
    0x00c7708c:  0x00880038 : Dword 2
    Data DWord: 8912952

Into this:

0x007880f0:  0x11000001:  MI_LOAD_REGISTER_IMM
0x007880f4:  0x0000b020 : Dword 1
    Register Offset: 0x0000b020
    0x007880f8:  0x00080040 : Dword 2
    Data DWord: 524352
register L3CNTLREG2 (0xb020) : 0x80040
    SLM Enable: 0
    URB Allocation: 32
    URB Low Bandwidth: 0
    RO Allocation: 32
    RO Low Bandwidth: 0
    DC Allocation: 0
    DC Low Bandwidth: 0

v2: Drop unused arguments (Sirisha)
    Print out register name

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-09-20 10:47:21 +01:00
..
.gitignore mesa: Add some more .gitignore 2016-08-31 13:45:27 -07:00
aubinator.c aubinator: add a custom handler for immediate register load 2016-09-20 10:47:21 +01:00
decoder.c aubinator: add a custom handler for immediate register load 2016-09-20 10:47:21 +01:00
decoder.h aubinator: add a custom handler for immediate register load 2016-09-20 10:47:21 +01:00
disasm.c aubinator: Remove bogus "end" parameter in gen_disasm_disassemble() 2016-09-13 16:32:42 -07:00
gen_disasm.h aubinator: Remove bogus "end" parameter in gen_disasm_disassemble() 2016-09-13 16:32:42 -07:00
Makefile.am intel: Add a new "common" library for more code sharing 2016-09-03 08:23:06 -07:00