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Push constants on bindless stages of Gfx12.5+ don't get the data delivered in the registers automatically. Instead the shader needs to load the data with SEND messages. Those stages do get a single InlineParameter 32B block of data delivered into the EU. We can use that to promote some of the push constant data that has to be pulled otherwise. The driver will try to promote all push constant data (app + driver values) if it can, if it can't it'll try to promote only the driver values (usually a shader will only use a few driver values). If even the drivers values won't fit, give up and don't use the inline parameter at all. LNL internal fossil-db: Totals from 315738 (20.08% of 1572649) affected shaders: Instrs: 155053691 -> 154920901 (-0.09%); split: -0.09%, +0.00% CodeSize: 2578204272 -> 2574991568 (-0.12%); split: -0.15%, +0.02% Send messages: 8235628 -> 8184485 (-0.62%); split: -0.62%, +0.00% Cycle count: 43911938816 -> 43901857748 (-0.02%); split: -0.05%, +0.03% Spill count: 481329 -> 473185 (-1.69%); split: -1.82%, +0.13% Fill count: 405617 -> 399243 (-1.57%); split: -1.86%, +0.28% Max live registers: 34309395 -> 34309300 (-0.00%); split: -0.00%, +0.00% Max dispatch width: 8298224 -> 8299168 (+0.01%) Non SSA regs after NIR: 18492887 -> 17631285 (-4.66%); split: -4.73%, +0.08% Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39405> |
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| .. | ||
| brw | ||
| elk | ||
| brw_device_sha1_gen_c.py | ||
| brw_list.h | ||
| intel_gfx_ver_enum.h | ||
| intel_nir.c | ||
| intel_nir.h | ||
| intel_nir_blockify_uniform_loads.c | ||
| intel_nir_clamp_image_1d_2d_array_sizes.c | ||
| intel_nir_clamp_per_vertex_loads.c | ||
| intel_nir_lower_non_uniform_barycentric_at_sample.c | ||
| intel_nir_lower_non_uniform_resource_intel.c | ||
| intel_nir_lower_printf.c | ||
| intel_nir_lower_shading_rate_output.c | ||
| intel_nir_lower_sparse.c | ||
| intel_nir_opt_peephole_ffma.c | ||
| intel_nir_opt_peephole_imul32x16.c | ||
| intel_nir_tcs_workarounds.c | ||
| intel_prim.h | ||
| intel_shader_enums.h | ||
| meson.build | ||