Yogesh Mohan Marimuthu 44f25792d5 radv: allow NULL initial_preamble_cs in radv_amdgpu_winsys_cs_submit_sysmem() ... In case of mcbp, shadowed_regs is initialized early in radv_queue_init() function by submitting the command buffer. The command buffer is submitted in radv_init_shadowed_regs_buffer_state() function. When RADV_DEBUG=noibs is used radv_amdgpu_winsys_cs_submit_sysmem() function is used to submit command buffer. radv_amdgpu_winsys_cs_submit_sysmem() crashes here because initial_preamble_cs is NULL. This patch fixes the radv_amdgpu_winsys_cs_submit_sysmem() function to support NULL initial_preamble_cs. Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>		2023-01-25 04:53:34 +00:00
..
addrlib	meson: Enable initialized-but-unused warning for MSVC	2022-11-17 21:20:38 +00:00
ci	ci/piglit: Add some common piglit skips for Mesa CI's testing of glx.	2023-01-24 00:13:02 +00:00
common	ac,radeonsi: move shadow regs create ib preamble function to amd common	2023-01-25 04:53:34 +00:00
compiler	Revert "aco: Combine v_cvt_u32_f32 with insert to v_cvt_pk_u8_f32."	2023-01-23 16:22:55 +00:00
drm-shim	r300: use drm_shim_override	2022-11-16 14:37:47 +00:00
llvm	ac/llvm: add support for fp32 addition atomics	2023-01-17 17:39:15 +00:00
registers	amd/registers: regenerate gfx11 headers from amd-staging-drm-next	2022-11-04 00:42:08 +00:00
vulkan	radv: allow NULL initial_preamble_cs in radv_amdgpu_winsys_cs_submit_sysmem()	2023-01-25 04:53:34 +00:00
.clang-format	radv: Add nir_foreach_variable_with_modes to .clang-format	2022-12-09 07:07:10 +00:00
meson.build	meson: build radeon drm-shim also for r300 and r600	2022-11-16 14:37:47 +00:00