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44e48751d2
This adds some generic infrastructure that allows splitting any instruction into a number of instructions of a smaller legal execution type. This is meant to replace several instances of handcrafted 64bit type lowering done manually in the code generator, which is rather error-prone, prevents scheduling of the lowered instructions, and makes them invisible to the SWSB pass on Gfx12+ platforms, which will become especially problematic on Gfx12.5+ since the EUs introduce multiple asynchronous execution pipelines which the SWSB pass needs to be able to synchronize to one another, so it's critical for the real execution type of the instruction to be visible to the SWSB pass. Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14273> |
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| amd | ||
| android_stub | ||
| asahi | ||
| broadcom | ||
| compiler | ||
| drm-shim | ||
| egl | ||
| etnaviv | ||
| freedreno | ||
| gallium | ||
| gbm | ||
| getopt | ||
| glx | ||
| gtest | ||
| hgl | ||
| imgui | ||
| intel | ||
| loader | ||
| mapi | ||
| mesa | ||
| microsoft | ||
| nouveau | ||
| panfrost | ||
| tool | ||
| util | ||
| virtio | ||
| vulkan | ||
| meson.build | ||