Nanley Chery 4309012774 intel/isl: Size Tile64 surfaces with 4 dimensions ... In order to size Tile64 surfaces correctly, make sure that the total physical extent is arrayed. The code should handle 3D surfaces as well, but is untested for now. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>		2021-08-25 22:39:30 +00:00
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blorp	intel/isl: Add msaa_layout param to isl_tiling_get_info	2021-08-25 22:39:30 +00:00
common	meson/intel: Don't build genxml tests on Android	2021-08-11 23:57:52 +00:00
compiler	intel/compiler: Basic support for DP4A instruction	2021-08-24 19:58:57 +00:00
dev	intel: Parse INTEL_NO_HW for devinfo construction	2021-08-24 00:12:47 +00:00
ds	pps: fix a missing include in Intel pps driver	2021-05-21 22:03:16 +00:00
genxml	genxml: add INSTDONE_GEOM register for Gfx12.5	2021-08-17 08:05:45 +00:00
isl	intel/isl: Size Tile64 surfaces with 4 dimensions	2021-08-25 22:39:30 +00:00
nullhw-layer	intel/nullhw: fix build	2021-03-26 20:12:40 +00:00
perf	intel/perf: Use a char array for OA perf query data	2021-08-11 23:57:52 +00:00
tools	intel/error-decode: printout INSTDONE_GEOM register for Gfx12.5	2021-08-17 08:05:45 +00:00
vulkan	intel: Parse INTEL_NO_HW for devinfo construction	2021-08-24 00:12:47 +00:00
Makefile.perf.am	intel: Rename GEN_PERF prefix to INTEL_PERF in build files	2021-04-20 20:06:34 +00:00
meson.build	pps: Intel pps driver	2021-05-18 14:28:48 +00:00