mesa/src/intel
Kevin Chuang 40fb95d51a intel/compiler: Use 24bits for hit_kind on Xe3+
For Xe3+, the upper 8 bits of the second dword of a potential hit is
used to store hitGroupIndex0, which is stuffed by the HW. This
hitGroupIndex0 will later be used by the HW again to reconstruct the
whole hitGroupIndex when driver issues a TRACE_RAY_COMMIT.

We were corrupting this hitGroupIndex0 at the driver by setting the
whole dword to hit_kind, which will cause the HW to read a wrong
hitGroupIndex and therefore invoke a wrong closest hit shader. The
behavior can be seen in
dEQP-VK.ray_tracing_pipeline.pipeline_no_null_shaders_flag.gpu.boxes.\*
and dEQP-VK.ray_tracing_pipeline.pipeline_library.configurations.\*

This commit changes the driver to only use lower 24bits to store the
hit_kind, and leave the upper 8bits as it.

Signed-off-by: Kevin Chuang <kaiwenjon23@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33047>
2025-04-21 20:10:45 +00:00
..
blorp intel: Program XY_FAST_COLOR_BLT::Destination Mocs for gfx12 2025-04-17 18:11:44 +00:00
ci ci/piglit: Use structured tagging for Piglit 2025-04-17 09:22:39 +00:00
common intel: Use devinfo->urb.min_entries[GS and TCS] for setting URB configs 2025-03-10 17:23:07 -07:00
compiler intel/compiler: Use 24bits for hit_kind on Xe3+ 2025-04-21 20:10:45 +00:00
decoder intel/brw: support for dumping shader line numbers 2025-04-08 19:39:53 +00:00
dev intel: Disable has_bfloat16 for MTL 2025-04-14 18:23:43 +00:00
ds perfetto/android: align datasource names with tooling expectations 2025-04-08 18:29:10 +00:00
executor intel/executor: Update bfloat example 2025-04-14 18:23:43 +00:00
genxml anv: Update RT dispatch globals to use 64bit data structure 2025-04-21 20:10:45 +00:00
isl isl: enable CPB compression 2025-03-28 04:38:09 +00:00
nullhw-layer build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00
perf intel/perf: Update intel_perf to match xe_drm.h 2025-04-11 18:35:49 +00:00
shaders intel: use common CL args 2025-03-06 00:43:59 +00:00
tools intel/tools: fix 32b build for EU stall tool 2025-04-09 21:40:46 +00:00
vulkan anv: Update RT dispatch globals to use 64bit data structure 2025-04-21 20:10:45 +00:00
vulkan_hasvk spirv, nir: Delay calculation of shared_size when using explicit layout 2025-04-17 19:13:17 +00:00
meson.build intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00