mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-21 15:50:11 +01:00
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29502>
381 lines
12 KiB
C
381 lines
12 KiB
C
/*
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* Copyright © 2020 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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/*
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* Optimizes atomics (with uniform offsets) using subgroup operations to ensure
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* only one atomic operation is done per subgroup. So res = atomicAdd(addr, 1)
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* would become something like:
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*
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* uint tmp = subgroupAdd(1);
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* uint res;
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* if (subgroupElect())
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* res = atomicAdd(addr, tmp);
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* res = subgroupBroadcastFirst(res) + subgroupExclusiveAdd(1);
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*
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* This pass requires and preserves LCSSA and divergence information.
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*/
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#include "nir/nir.h"
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#include "nir/nir_builder.h"
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static nir_op
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atomic_op_to_alu(nir_atomic_op op)
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{
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switch (op) {
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case nir_atomic_op_iadd:
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return nir_op_iadd;
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case nir_atomic_op_imin:
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return nir_op_imin;
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case nir_atomic_op_umin:
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return nir_op_umin;
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case nir_atomic_op_imax:
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return nir_op_imax;
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case nir_atomic_op_umax:
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return nir_op_umax;
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case nir_atomic_op_iand:
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return nir_op_iand;
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case nir_atomic_op_ior:
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return nir_op_ior;
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case nir_atomic_op_ixor:
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return nir_op_ixor;
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case nir_atomic_op_fadd:
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return nir_op_fadd;
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case nir_atomic_op_fmin:
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return nir_op_fmin;
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case nir_atomic_op_fmax:
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return nir_op_fmax;
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/* We don't handle exchanges or wraps */
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case nir_atomic_op_xchg:
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case nir_atomic_op_cmpxchg:
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case nir_atomic_op_fcmpxchg:
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case nir_atomic_op_inc_wrap:
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case nir_atomic_op_dec_wrap:
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case nir_atomic_op_ordered_add_gfx12_amd:
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return nir_num_opcodes;
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}
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unreachable("Unknown atomic op");
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}
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static nir_op
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parse_atomic_op(nir_intrinsic_instr *intr, unsigned *offset_src,
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unsigned *data_src, unsigned *offset2_src)
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{
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switch (intr->intrinsic) {
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case nir_intrinsic_ssbo_atomic:
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*offset_src = 1;
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*data_src = 2;
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*offset2_src = *offset_src;
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return atomic_op_to_alu(nir_intrinsic_atomic_op(intr));
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case nir_intrinsic_shared_atomic:
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case nir_intrinsic_global_atomic:
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case nir_intrinsic_deref_atomic:
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*offset_src = 0;
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*data_src = 1;
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*offset2_src = *offset_src;
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return atomic_op_to_alu(nir_intrinsic_atomic_op(intr));
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case nir_intrinsic_global_atomic_amd:
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*offset_src = 0;
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*data_src = 1;
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*offset2_src = 2;
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return atomic_op_to_alu(nir_intrinsic_atomic_op(intr));
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case nir_intrinsic_image_deref_atomic:
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case nir_intrinsic_image_atomic:
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case nir_intrinsic_bindless_image_atomic:
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*offset_src = 1;
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*data_src = 3;
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*offset2_src = *offset_src;
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return atomic_op_to_alu(nir_intrinsic_atomic_op(intr));
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default:
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return nir_num_opcodes;
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}
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}
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static unsigned
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get_dim(nir_scalar scalar)
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{
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if (!scalar.def->divergent)
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return 0;
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if (nir_scalar_is_intrinsic(scalar)) {
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switch (nir_scalar_intrinsic_op(scalar)) {
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case nir_intrinsic_load_subgroup_invocation:
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return 0x8;
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case nir_intrinsic_load_global_invocation_index:
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case nir_intrinsic_load_local_invocation_index:
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return 0x7;
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case nir_intrinsic_load_global_invocation_id:
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case nir_intrinsic_load_local_invocation_id:
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return 1 << scalar.comp;
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default:
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break;
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}
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} else if (nir_scalar_is_alu(scalar)) {
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if (nir_scalar_alu_op(scalar) == nir_op_iadd ||
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nir_scalar_alu_op(scalar) == nir_op_imul) {
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nir_scalar src0 = nir_scalar_chase_alu_src(scalar, 0);
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nir_scalar src1 = nir_scalar_chase_alu_src(scalar, 1);
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unsigned src0_dim = get_dim(src0);
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if (!src0_dim && src0.def->divergent)
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return 0;
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unsigned src1_dim = get_dim(src1);
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if (!src1_dim && src1.def->divergent)
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return 0;
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return src0_dim | src1_dim;
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} else if (nir_scalar_alu_op(scalar) == nir_op_ishl) {
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nir_scalar src0 = nir_scalar_chase_alu_src(scalar, 0);
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nir_scalar src1 = nir_scalar_chase_alu_src(scalar, 1);
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return src1.def->divergent ? 0 : get_dim(src0);
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}
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}
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return 0;
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}
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/* Returns a bitmask of invocation indices that are compared against a subgroup
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* uniform value.
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*/
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static unsigned
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match_invocation_comparison(nir_scalar scalar)
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{
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bool is_alu = nir_scalar_is_alu(scalar);
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if (is_alu && nir_scalar_alu_op(scalar) == nir_op_iand) {
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return match_invocation_comparison(nir_scalar_chase_alu_src(scalar, 0)) |
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match_invocation_comparison(nir_scalar_chase_alu_src(scalar, 1));
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} else if (is_alu && nir_scalar_alu_op(scalar) == nir_op_ieq) {
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if (!nir_scalar_chase_alu_src(scalar, 0).def->divergent)
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return get_dim(nir_scalar_chase_alu_src(scalar, 1));
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if (!nir_scalar_chase_alu_src(scalar, 1).def->divergent)
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return get_dim(nir_scalar_chase_alu_src(scalar, 0));
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} else if (scalar.def->parent_instr->type == nir_instr_type_intrinsic) {
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(scalar.def->parent_instr);
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if (intrin->intrinsic == nir_intrinsic_elect) {
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return 0x8;
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} else if (intrin->intrinsic == nir_intrinsic_inverse_ballot) {
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unsigned bitcount = 0;
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for (unsigned i = 0; i < intrin->src[0].ssa->num_components; i++) {
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scalar = nir_scalar_resolved(intrin->src[0].ssa, i);
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if (!nir_scalar_is_const(scalar))
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return 0;
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bitcount += util_bitcount64(nir_scalar_as_uint(scalar));
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}
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if (bitcount <= 1)
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return 0x8;
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}
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}
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return 0;
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}
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/* Returns true if the intrinsic is already conditional so that at most one
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* invocation in the subgroup does the atomic.
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*/
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static bool
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is_atomic_already_optimized(nir_shader *shader, nir_intrinsic_instr *instr)
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{
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unsigned dims = 0;
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for (nir_cf_node *cf = &instr->instr.block->cf_node; cf; cf = cf->parent) {
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if (cf->type == nir_cf_node_if) {
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nir_block *first_then = nir_if_first_then_block(nir_cf_node_as_if(cf));
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nir_block *last_then = nir_if_last_then_block(nir_cf_node_as_if(cf));
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bool within_then = instr->instr.block->index >= first_then->index;
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within_then = within_then && instr->instr.block->index <= last_then->index;
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if (!within_then)
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continue;
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nir_scalar cond = { nir_cf_node_as_if(cf)->condition.ssa, 0 };
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dims |= match_invocation_comparison(cond);
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}
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}
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if (gl_shader_stage_uses_workgroup(shader->info.stage)) {
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unsigned dims_needed = 0;
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for (unsigned i = 0; i < 3; i++)
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dims_needed |= (shader->info.workgroup_size_variable ||
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shader->info.workgroup_size[i] > 1)
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<< i;
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if ((dims & dims_needed) == dims_needed)
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return true;
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}
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return dims & 0x8;
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}
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/* Perform a reduction and/or exclusive scan. */
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static void
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reduce_data(nir_builder *b, nir_op op, nir_def *data,
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nir_def **reduce, nir_def **scan)
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{
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if (scan) {
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*scan = nir_exclusive_scan(b, data, .reduction_op = op);
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if (reduce) {
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nir_def *last_lane = nir_last_invocation(b);
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nir_def *res = nir_build_alu(b, op, *scan, data, NULL, NULL);
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*reduce = nir_read_invocation(b, res, last_lane);
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}
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} else {
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*reduce = nir_reduce(b, data, .reduction_op = op);
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}
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}
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static nir_def *
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optimize_atomic(nir_builder *b, nir_intrinsic_instr *intrin, bool return_prev)
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{
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unsigned offset_src = 0;
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unsigned data_src = 0;
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unsigned offset2_src = 0;
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nir_op op = parse_atomic_op(intrin, &offset_src, &data_src, &offset2_src);
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nir_def *data = intrin->src[data_src].ssa;
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/* Separate uniform reduction and scan is faster than doing a combined scan+reduce */
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bool combined_scan_reduce = return_prev && data->divergent;
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nir_def *reduce = NULL, *scan = NULL;
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reduce_data(b, op, data, &reduce, combined_scan_reduce ? &scan : NULL);
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nir_src_rewrite(&intrin->src[data_src], reduce);
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nir_update_instr_divergence(b->shader, &intrin->instr);
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nir_def *cond = nir_elect(b, 1);
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nir_if *nif = nir_push_if(b, cond);
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nir_instr_remove(&intrin->instr);
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nir_builder_instr_insert(b, &intrin->instr);
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if (return_prev) {
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nir_push_else(b, nif);
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nir_def *undef = nir_undef(b, 1, intrin->def.bit_size);
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nir_pop_if(b, nif);
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nir_def *result = nir_if_phi(b, &intrin->def, undef);
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result = nir_read_first_invocation(b, result);
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if (!combined_scan_reduce)
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reduce_data(b, op, data, NULL, &scan);
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return nir_build_alu(b, op, result, scan, NULL, NULL);
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} else {
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nir_pop_if(b, nif);
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return NULL;
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}
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}
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static void
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optimize_and_rewrite_atomic(nir_builder *b, nir_intrinsic_instr *intrin)
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{
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nir_if *helper_nif = NULL;
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if (b->shader->info.stage == MESA_SHADER_FRAGMENT) {
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nir_def *helper = nir_is_helper_invocation(b, 1);
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helper_nif = nir_push_if(b, nir_inot(b, helper));
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}
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ASSERTED bool original_result_divergent = intrin->def.divergent;
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bool return_prev = !nir_def_is_unused(&intrin->def);
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nir_def old_result = intrin->def;
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list_replace(&intrin->def.uses, &old_result.uses);
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nir_def_init(&intrin->instr, &intrin->def, 1,
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intrin->def.bit_size);
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nir_def *result = optimize_atomic(b, intrin, return_prev);
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if (helper_nif) {
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nir_push_else(b, helper_nif);
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nir_def *undef = result ? nir_undef(b, 1, result->bit_size) : NULL;
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nir_pop_if(b, helper_nif);
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if (result)
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result = nir_if_phi(b, result, undef);
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}
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if (result) {
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assert(result->divergent == original_result_divergent);
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nir_def_rewrite_uses(&old_result, result);
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}
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}
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static bool
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opt_uniform_atomics(nir_function_impl *impl)
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{
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bool progress = false;
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nir_builder b = nir_builder_create(impl);
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b.update_divergence = true;
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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unsigned offset_src, data_src, offset2_src;
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if (parse_atomic_op(intrin, &offset_src, &data_src, &offset2_src) ==
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nir_num_opcodes)
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continue;
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if (nir_src_is_divergent(intrin->src[offset_src]))
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continue;
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if (nir_src_is_divergent(intrin->src[offset2_src]))
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continue;
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if (is_atomic_already_optimized(b.shader, intrin))
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continue;
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b.cursor = nir_before_instr(instr);
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optimize_and_rewrite_atomic(&b, intrin);
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progress = true;
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}
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}
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return progress;
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}
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bool
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nir_opt_uniform_atomics(nir_shader *shader)
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{
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bool progress = false;
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/* A 1x1x1 workgroup only ever has one active lane, so there's no point in
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* optimizing any atomics.
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*/
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if (gl_shader_stage_uses_workgroup(shader->info.stage) &&
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!shader->info.workgroup_size_variable &&
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shader->info.workgroup_size[0] == 1 && shader->info.workgroup_size[1] == 1 &&
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shader->info.workgroup_size[2] == 1)
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return false;
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nir_foreach_function_impl(impl, shader) {
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if (opt_uniform_atomics(impl)) {
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progress = true;
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nir_metadata_preserve(impl, nir_metadata_none);
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} else {
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nir_metadata_preserve(impl, nir_metadata_all);
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}
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}
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return progress;
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}
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