Danylo Piliaiev b7c7abded7 nir/serialize: Make more space for intrinsic_op allowing 1024 ops ... We are close to the limit of 512 intrinsics, make more space to be able to support up to 1024 intrinsics. Take one bit from packed_const_indices, they shouldn't suffer in a common case. Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13456>		2021-10-25 16:17:09 +00:00
..
clc	compiler/clc: Preserve OCL kernel arg type metadata on LLVM13	2021-10-04 18:16:01 +00:00
glsl	compiler/types: Add a wrap_in_arrays helper	2021-10-16 05:49:34 +00:00
isaspec	isaspec: inherite parent's bitset gpu gen requirements	2021-10-21 18:59:57 +00:00
nir	nir/serialize: Make more space for intrinsic_op allowing 1024 ops	2021-10-25 16:17:09 +00:00
spirv	spirv: Don't add 0.5 to array indicies for OpImageSampleExplicitLod	2021-10-18 12:21:52 +10:00
builtin_type_macros.h	compiler/types: Add a texture type	2021-10-16 05:49:34 +00:00
glsl_types.cpp	compiler/types: Add a texture type	2021-10-16 05:49:34 +00:00
glsl_types.h	compiler/types: Add a texture type	2021-10-16 05:49:34 +00:00
meson.build	spirv: Use a single binary for gtests	2021-10-20 17:55:36 +00:00
nir_types.cpp	compiler/types: Add a wrap_in_arrays helper	2021-10-16 05:49:34 +00:00
nir_types.h	compiler/types: Add a wrap_in_arrays helper	2021-10-16 05:49:34 +00:00
shader_enums.c	compiler: Add new non-Multiview Task/Mesh builtins	2021-08-28 03:56:42 +00:00
shader_enums.h	compiler: Add new non-Multiview Task/Mesh builtins	2021-08-28 03:56:42 +00:00
shader_info.h	spirv: switch Groups capability to non AMD specific field	2021-09-29 15:40:20 +00:00