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74f1d4f47b
Minor adjustments to formatting of the copyright line, but keep dates and holders. "Authors" entries that could be obtained via Git logs were also removed. The license in brw_disasm.c and elk_disasm.c don't match directly any SPDX pattern I could find, so kept as is. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39503>
117 lines
4 KiB
C
117 lines
4 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "compiler/nir/nir_builder.h"
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#include "intel_nir.h"
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/**
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* Implements the WaPreventHSTessLevelsInterference workaround (for Gfx7-8).
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*
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* From the Broadwell PRM, Volume 7 (3D-Media-GPGPU), Page 494 (below the
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* definition of the patch header layouts):
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*
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* "HW Bug: The Tessellation stage will incorrectly add domain points
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* along patch edges under the following conditions, which may result
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* in conformance failures and/or cracking artifacts:
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*
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* * QUAD domain
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* * INTEGER partitioning
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* * All three TessFactors in a given U or V direction (e.g., V
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* direction: UEQ0, InsideV, UEQ1) are all exactly 1.0
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* * All three TessFactors in the other direction are > 1.0 and all
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* round up to the same integer value (e.g, U direction:
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* VEQ0 = 3.1, InsideU = 3.7, VEQ1 = 3.4)
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*
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* The suggested workaround (to be implemented as part of the postamble
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* to the HS shader in the HS kernel) is:
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*
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* if (
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* (TF[UEQ0] > 1.0) ||
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* (TF[VEQ0] > 1.0) ||
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* (TF[UEQ1] > 1.0) ||
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* (TF[VEQ1] > 1.0) ||
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* (TF[INSIDE_U] > 1.0) ||
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* (TF[INSIDE_V] > 1.0) )
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* {
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* TF[INSIDE_U] = (TF[INSIDE_U] == 1.0) ? 2.0 : TF[INSIDE_U];
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* TF[INSIDE_V] = (TF[INSIDE_V] == 1.0) ? 2.0 : TF[INSIDE_V];
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* }"
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*
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* There's a subtlety here. Intel internal HSD-ES bug 1208668495 notes
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* that the above workaround fails to fix certain GL/ES CTS tests which
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* have inside tessellation factors of -1.0. This can be explained by
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* a quote from the ARB_tessellation_shader specification:
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*
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* "If "equal_spacing" is used, the floating-point tessellation level is
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* first clamped to the range [1,<max>], where <max> is implementation-
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* dependent maximum tessellation level (MAX_TESS_GEN_LEVEL)."
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*
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* In other words, the actual inner tessellation factor used is
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* clamp(TF[INSIDE_*], 1.0, 64.0). So we want to compare the clamped
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* value against 1.0. To accomplish this, we change the comparison from
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* (TF[INSIDE_*] == 1.0) to (TF[INSIDE_*] <= 1.0).
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*/
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static inline nir_def *
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load_output(nir_builder *b, int num_components, int offset, int component)
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{
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return nir_load_output(b, num_components, 32, nir_imm_int(b, 0),
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.base = offset,
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.component = component);
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}
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static void
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emit_quads_workaround(nir_builder *b, nir_block *block)
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{
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b->cursor = nir_after_block_before_jump(block);
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nir_def *inner = load_output(b, 2, 0, 2);
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nir_def *outer = load_output(b, 4, 1, 0);
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nir_def *any_greater_than_1 =
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nir_ior(b, nir_bany(b, nir_fgt_imm(b, outer, 1.0f)),
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nir_bany(b, nir_fgt_imm(b, inner, 1.0f)));
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nir_push_if(b, any_greater_than_1);
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inner = nir_bcsel(b, nir_fle_imm(b, inner, 1.0f),
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nir_imm_float(b, 2.0f), inner);
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nir_store_output(b, inner, nir_imm_int(b, 0),
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.src_type = nir_type_uint32,
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.component = 2,
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.write_mask = WRITEMASK_XY);
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nir_pop_if(b, NULL);
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}
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void
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intel_nir_apply_tcs_quads_workaround(nir_shader *nir)
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{
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assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
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nir_function_impl *impl = nir_shader_get_entrypoint(nir);
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nir_builder b = nir_builder_create(impl);
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/* emit_quads_workaround() inserts an if statement into each block,
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* which splits it in two. This changes the set of predecessors of
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* the end block. We want to process the original set, so to be safe,
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* save it off to an array first.
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*/
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const unsigned num_end_preds = impl->end_block->predecessors.entries;
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nir_block *end_preds[num_end_preds];
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unsigned i = 0;
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set_foreach(&impl->end_block->predecessors, entry) {
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end_preds[i++] = (nir_block *) entry->key;
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}
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for (i = 0; i < num_end_preds; i++) {
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emit_quads_workaround(&b, end_preds[i]);
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}
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nir_progress(true, impl, nir_metadata_none);
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}
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