mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-26 21:30:09 +01:00
9076c4e289
Some opcodes need explicit bitsizes, and sometimes we need to use the
double version when constant folding.
v2: fix output type for u2f (Iago)
v3: do not change vecN opcodes to be float. The next commit will add
infrastructure to enable 64-bit integer constant folding so this is isn't
really necessary. Also, that created problems with source modifiers in
some cases (Iago)
v4 (Jason):
- do not change bcsel to work in terms of floats
- leave ldexp generic
Squashed changes to handle different bit sizes when constant
folding since otherwise we would break the build.
v2:
- Use the bit-size information from the opcode information if defined (Iago)
- Use helpers to get type size and base type of nir_alu_type enum (Sam)
- Do not fallback to sized types to guess bit-size information. (Jason)
Squashed changes in i965 and gallium/nir drivers to support sized types.
These functions should only see sized types, but we can't make that change
until we make sure that nir uses the sized versions in all the relevant places.
A later commit will address this.
Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
691 lines
23 KiB
Python
691 lines
23 KiB
Python
#! /usr/bin/env python
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#
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# Copyright (C) 2014 Connor Abbott
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice (including the next
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# paragraph) shall be included in all copies or substantial portions of the
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# Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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# IN THE SOFTWARE.
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#
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# Authors:
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# Connor Abbott (cwabbott0@gmail.com)
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# Class that represents all the information we have about the opcode
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# NOTE: this must be kept in sync with nir_op_info
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class Opcode(object):
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"""Class that represents all the information we have about the opcode
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NOTE: this must be kept in sync with nir_op_info
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"""
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def __init__(self, name, output_size, output_type, input_sizes,
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input_types, algebraic_properties, const_expr):
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"""Parameters:
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- name is the name of the opcode (prepend nir_op_ for the enum name)
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- all types are strings that get nir_type_ prepended to them
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- input_types is a list of types
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- algebraic_properties is a space-seperated string, where nir_op_is_ is
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prepended before each entry
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- const_expr is an expression or series of statements that computes the
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constant value of the opcode given the constant values of its inputs.
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Constant expressions are formed from the variables src0, src1, ...,
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src(N-1), where N is the number of arguments. The output of the
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expression should be stored in the dst variable. Per-component input
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and output variables will be scalars and non-per-component input and
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output variables will be a struct with fields named x, y, z, and w
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all of the correct type. Input and output variables can be assumed
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to already be of the correct type and need no conversion. In
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particular, the conversion from the C bool type to/from NIR_TRUE and
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NIR_FALSE happens automatically.
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For per-component instructions, the entire expression will be
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executed once for each component. For non-per-component
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instructions, the expression is expected to store the correct values
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in dst.x, dst.y, etc. If "dst" does not exist anywhere in the
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constant expression, an assignment to dst will happen automatically
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and the result will be equivalent to "dst = <expression>" for
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per-component instructions and "dst.x = dst.y = ... = <expression>"
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for non-per-component instructions.
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"""
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assert isinstance(name, str)
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assert isinstance(output_size, int)
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assert isinstance(output_type, str)
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assert isinstance(input_sizes, list)
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assert isinstance(input_sizes[0], int)
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assert isinstance(input_types, list)
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assert isinstance(input_types[0], str)
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assert isinstance(algebraic_properties, str)
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assert isinstance(const_expr, str)
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assert len(input_sizes) == len(input_types)
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assert 0 <= output_size <= 4
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for size in input_sizes:
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assert 0 <= size <= 4
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if output_size != 0:
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assert size != 0
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self.name = name
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self.num_inputs = len(input_sizes)
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self.output_size = output_size
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self.output_type = output_type
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self.input_sizes = input_sizes
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self.input_types = input_types
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self.algebraic_properties = algebraic_properties
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self.const_expr = const_expr
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# helper variables for strings
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tfloat = "float"
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tint = "int"
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tbool = "bool32"
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tuint = "uint"
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tfloat32 = "float32"
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tint32 = "int32"
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tuint32 = "uint32"
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tfloat64 = "float64"
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commutative = "commutative "
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associative = "associative "
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# global dictionary of opcodes
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opcodes = {}
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def opcode(name, output_size, output_type, input_sizes, input_types,
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algebraic_properties, const_expr):
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assert name not in opcodes
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opcodes[name] = Opcode(name, output_size, output_type, input_sizes,
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input_types, algebraic_properties, const_expr)
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def unop_convert(name, out_type, in_type, const_expr):
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opcode(name, 0, out_type, [0], [in_type], "", const_expr)
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def unop(name, ty, const_expr):
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opcode(name, 0, ty, [0], [ty], "", const_expr)
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def unop_horiz(name, output_size, output_type, input_size, input_type,
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const_expr):
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opcode(name, output_size, output_type, [input_size], [input_type], "",
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const_expr)
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def unop_reduce(name, output_size, output_type, input_type, prereduce_expr,
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reduce_expr, final_expr):
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def prereduce(src):
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return "(" + prereduce_expr.format(src=src) + ")"
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def final(src):
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return final_expr.format(src="(" + src + ")")
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def reduce_(src0, src1):
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return reduce_expr.format(src0=src0, src1=src1)
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src0 = prereduce("src0.x")
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src1 = prereduce("src0.y")
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src2 = prereduce("src0.z")
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src3 = prereduce("src0.w")
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unop_horiz(name + "2", output_size, output_type, 2, input_type,
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final(reduce_(src0, src1)))
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unop_horiz(name + "3", output_size, output_type, 3, input_type,
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final(reduce_(reduce_(src0, src1), src2)))
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unop_horiz(name + "4", output_size, output_type, 4, input_type,
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final(reduce_(reduce_(src0, src1), reduce_(src2, src3))))
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# These two move instructions differ in what modifiers they support and what
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# the negate modifier means. Otherwise, they are identical.
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unop("fmov", tfloat, "src0")
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unop("imov", tint, "src0")
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unop("ineg", tint, "-src0")
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unop("fneg", tfloat, "-src0")
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unop("inot", tint, "~src0") # invert every bit of the integer
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unop("fnot", tfloat, "(src0 == 0.0f) ? 1.0f : 0.0f")
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unop("fsign", tfloat, "(src0 == 0.0f) ? 0.0f : ((src0 > 0.0f) ? 1.0f : -1.0f)")
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unop("isign", tint, "(src0 == 0) ? 0 : ((src0 > 0) ? 1 : -1)")
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unop("iabs", tint, "(src0 < 0) ? -src0 : src0")
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unop("fabs", tfloat, "fabsf(src0)")
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unop("fsat", tfloat, "(src0 > 1.0f) ? 1.0f : ((src0 <= 0.0f) ? 0.0f : src0)")
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unop("frcp", tfloat, "1.0f / src0")
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unop("frsq", tfloat, "1.0f / sqrtf(src0)")
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unop("fsqrt", tfloat, "sqrtf(src0)")
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unop("fexp2", tfloat, "exp2f(src0)")
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unop("flog2", tfloat, "log2f(src0)")
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unop_convert("f2i", tint32, tfloat32, "src0") # Float-to-integer conversion.
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unop_convert("f2u", tuint32, tfloat32, "src0") # Float-to-unsigned conversion
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unop_convert("i2f", tfloat32, tint32, "src0") # Integer-to-float conversion.
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# Float-to-boolean conversion
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unop_convert("f2b", tbool, tfloat32, "src0 != 0.0f")
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# Boolean-to-float conversion
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unop_convert("b2f", tfloat32, tbool, "src0 ? 1.0f : 0.0f")
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# Int-to-boolean conversion
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unop_convert("i2b", tbool, tint32, "src0 != 0")
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unop_convert("b2i", tint32, tbool, "src0 ? 1 : 0") # Boolean-to-int conversion
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unop_convert("u2f", tfloat32, tuint32, "src0") # Unsigned-to-float conversion.
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# Unary floating-point rounding operations.
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unop("ftrunc", tfloat, "bit_size == 64 ? trunc(src0) : truncf(src0)")
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unop("fceil", tfloat, "bit_size == 64 ? ceil(src0) : ceilf(src0)")
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unop("ffloor", tfloat, "bit_size == 64 ? floor(src0) : floorf(src0)")
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unop("ffract", tfloat, "src0 - (bit_size == 64 ? floor(src0) : floorf(src0))")
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unop("fround_even", tfloat, "bit_size == 64 ? _mesa_roundeven(src0) : _mesa_roundevenf(src0)")
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# Trigonometric operations.
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unop("fsin", tfloat, "bit_size == 64 ? sin(src0) : sinf(src0)")
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unop("fcos", tfloat, "bit_size == 64 ? cos(src0) : cosf(src0)")
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# Partial derivatives.
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unop("fddx", tfloat, "0.0") # the derivative of a constant is 0.
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unop("fddy", tfloat, "0.0")
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unop("fddx_fine", tfloat, "0.0")
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unop("fddy_fine", tfloat, "0.0")
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unop("fddx_coarse", tfloat, "0.0")
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unop("fddy_coarse", tfloat, "0.0")
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# Floating point pack and unpack operations.
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def pack_2x16(fmt):
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unop_horiz("pack_" + fmt + "_2x16", 1, tuint32, 2, tfloat32, """
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dst.x = (uint32_t) pack_fmt_1x16(src0.x);
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dst.x |= ((uint32_t) pack_fmt_1x16(src0.y)) << 16;
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""".replace("fmt", fmt))
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def pack_4x8(fmt):
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unop_horiz("pack_" + fmt + "_4x8", 1, tuint32, 4, tfloat32, """
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dst.x = (uint32_t) pack_fmt_1x8(src0.x);
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dst.x |= ((uint32_t) pack_fmt_1x8(src0.y)) << 8;
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dst.x |= ((uint32_t) pack_fmt_1x8(src0.z)) << 16;
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dst.x |= ((uint32_t) pack_fmt_1x8(src0.w)) << 24;
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""".replace("fmt", fmt))
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def unpack_2x16(fmt):
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unop_horiz("unpack_" + fmt + "_2x16", 2, tfloat32, 1, tuint32, """
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dst.x = unpack_fmt_1x16((uint16_t)(src0.x & 0xffff));
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dst.y = unpack_fmt_1x16((uint16_t)(src0.x << 16));
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""".replace("fmt", fmt))
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def unpack_4x8(fmt):
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unop_horiz("unpack_" + fmt + "_4x8", 4, tfloat32, 1, tuint32, """
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dst.x = unpack_fmt_1x8((uint8_t)(src0.x & 0xff));
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dst.y = unpack_fmt_1x8((uint8_t)((src0.x >> 8) & 0xff));
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dst.z = unpack_fmt_1x8((uint8_t)((src0.x >> 16) & 0xff));
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dst.w = unpack_fmt_1x8((uint8_t)(src0.x >> 24));
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""".replace("fmt", fmt))
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pack_2x16("snorm")
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pack_4x8("snorm")
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pack_2x16("unorm")
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pack_4x8("unorm")
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pack_2x16("half")
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unpack_2x16("snorm")
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unpack_4x8("snorm")
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unpack_2x16("unorm")
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unpack_4x8("unorm")
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unpack_2x16("half")
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unop_horiz("pack_uvec2_to_uint", 1, tuint32, 2, tuint32, """
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dst.x = (src0.x & 0xffff) | (src0.y >> 16);
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""")
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unop_horiz("pack_uvec4_to_uint", 1, tuint32, 4, tuint32, """
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dst.x = (src0.x << 0) |
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(src0.y << 8) |
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(src0.z << 16) |
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(src0.w << 24);
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""")
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# Lowered floating point unpacking operations.
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unop_horiz("unpack_half_2x16_split_x", 1, tfloat32, 1, tuint32,
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"unpack_half_1x16((uint16_t)(src0.x & 0xffff))")
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unop_horiz("unpack_half_2x16_split_y", 1, tfloat32, 1, tuint32,
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"unpack_half_1x16((uint16_t)(src0.x >> 16))")
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# Bit operations, part of ARB_gpu_shader5.
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unop("bitfield_reverse", tuint32, """
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/* we're not winning any awards for speed here, but that's ok */
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dst = 0;
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for (unsigned bit = 0; bit < 32; bit++)
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dst |= ((src0 >> bit) & 1) << (31 - bit);
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""")
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unop("bit_count", tuint32, """
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dst = 0;
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for (unsigned bit = 0; bit < 32; bit++) {
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if ((src0 >> bit) & 1)
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dst++;
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}
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""")
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unop_convert("ufind_msb", tint32, tuint32, """
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dst = -1;
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for (int bit = 31; bit > 0; bit--) {
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if ((src0 >> bit) & 1) {
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dst = bit;
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break;
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}
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}
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""")
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unop("ifind_msb", tint32, """
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dst = -1;
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for (int bit = 31; bit >= 0; bit--) {
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/* If src0 < 0, we're looking for the first 0 bit.
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* if src0 >= 0, we're looking for the first 1 bit.
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*/
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if ((((src0 >> bit) & 1) && (src0 >= 0)) ||
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(!((src0 >> bit) & 1) && (src0 < 0))) {
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dst = bit;
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break;
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}
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}
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""")
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unop("find_lsb", tint32, """
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dst = -1;
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for (unsigned bit = 0; bit < 32; bit++) {
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if ((src0 >> bit) & 1) {
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dst = bit;
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break;
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}
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}
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""")
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for i in xrange(1, 5):
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for j in xrange(1, 5):
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unop_horiz("fnoise{0}_{1}".format(i, j), i, tfloat, j, tfloat, "0.0f")
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def binop_convert(name, out_type, in_type, alg_props, const_expr):
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opcode(name, 0, out_type, [0, 0], [in_type, in_type], alg_props, const_expr)
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def binop(name, ty, alg_props, const_expr):
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binop_convert(name, ty, ty, alg_props, const_expr)
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def binop_compare(name, ty, alg_props, const_expr):
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binop_convert(name, tbool, ty, alg_props, const_expr)
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def binop_horiz(name, out_size, out_type, src1_size, src1_type, src2_size,
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src2_type, const_expr):
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opcode(name, out_size, out_type, [src1_size, src2_size], [src1_type, src2_type],
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"", const_expr)
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def binop_reduce(name, output_size, output_type, src_type, prereduce_expr,
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reduce_expr, final_expr):
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def final(src):
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return final_expr.format(src= "(" + src + ")")
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def reduce_(src0, src1):
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return reduce_expr.format(src0=src0, src1=src1)
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def prereduce(src0, src1):
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return "(" + prereduce_expr.format(src0=src0, src1=src1) + ")"
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src0 = prereduce("src0.x", "src1.x")
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src1 = prereduce("src0.y", "src1.y")
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src2 = prereduce("src0.z", "src1.z")
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src3 = prereduce("src0.w", "src1.w")
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opcode(name + "2", output_size, output_type,
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[2, 2], [src_type, src_type], commutative,
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final(reduce_(src0, src1)))
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opcode(name + "3", output_size, output_type,
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[3, 3], [src_type, src_type], commutative,
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final(reduce_(reduce_(src0, src1), src2)))
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opcode(name + "4", output_size, output_type,
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[4, 4], [src_type, src_type], commutative,
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final(reduce_(reduce_(src0, src1), reduce_(src2, src3))))
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binop("fadd", tfloat, commutative + associative, "src0 + src1")
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binop("iadd", tint, commutative + associative, "src0 + src1")
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binop("fsub", tfloat, "", "src0 - src1")
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binop("isub", tint, "", "src0 - src1")
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binop("fmul", tfloat, commutative + associative, "src0 * src1")
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# low 32-bits of signed/unsigned integer multiply
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binop("imul", tint, commutative + associative, "src0 * src1")
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# high 32-bits of signed integer multiply
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binop("imul_high", tint32, commutative,
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"(int32_t)(((int64_t) src0 * (int64_t) src1) >> 32)")
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# high 32-bits of unsigned integer multiply
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binop("umul_high", tuint32, commutative,
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"(uint32_t)(((uint64_t) src0 * (uint64_t) src1) >> 32)")
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binop("fdiv", tfloat, "", "src0 / src1")
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binop("idiv", tint, "", "src0 / src1")
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binop("udiv", tuint, "", "src0 / src1")
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# returns a boolean representing the carry resulting from the addition of
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# the two unsigned arguments.
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binop_convert("uadd_carry", tuint, tuint, commutative, "src0 + src1 < src0")
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# returns a boolean representing the borrow resulting from the subtraction
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# of the two unsigned arguments.
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binop_convert("usub_borrow", tuint, tuint, "", "src0 < src1")
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binop("fmod", tfloat, "", "src0 - src1 * floorf(src0 / src1)")
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binop("umod", tuint, "", "src1 == 0 ? 0 : src0 % src1")
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#
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# Comparisons
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#
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# these integer-aware comparisons return a boolean (0 or ~0)
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binop_compare("flt", tfloat, "", "src0 < src1")
|
|
binop_compare("fge", tfloat, "", "src0 >= src1")
|
|
binop_compare("feq", tfloat, commutative, "src0 == src1")
|
|
binop_compare("fne", tfloat, commutative, "src0 != src1")
|
|
binop_compare("ilt", tint, "", "src0 < src1")
|
|
binop_compare("ige", tint, "", "src0 >= src1")
|
|
binop_compare("ieq", tint, commutative, "src0 == src1")
|
|
binop_compare("ine", tint, commutative, "src0 != src1")
|
|
binop_compare("ult", tuint, "", "src0 < src1")
|
|
binop_compare("uge", tuint, "", "src0 >= src1")
|
|
|
|
# integer-aware GLSL-style comparisons that compare floats and ints
|
|
|
|
binop_reduce("ball_fequal", 1, tbool, tfloat, "{src0} == {src1}",
|
|
"{src0} && {src1}", "{src}")
|
|
binop_reduce("bany_fnequal", 1, tbool, tfloat, "{src0} != {src1}",
|
|
"{src0} || {src1}", "{src}")
|
|
binop_reduce("ball_iequal", 1, tbool, tint, "{src0} == {src1}",
|
|
"{src0} && {src1}", "{src}")
|
|
binop_reduce("bany_inequal", 1, tbool, tint, "{src0} != {src1}",
|
|
"{src0} || {src1}", "{src}")
|
|
|
|
# non-integer-aware GLSL-style comparisons that return 0.0 or 1.0
|
|
|
|
binop_reduce("fall_equal", 1, tfloat32, tfloat32, "{src0} == {src1}",
|
|
"{src0} && {src1}", "{src} ? 1.0f : 0.0f")
|
|
binop_reduce("fany_nequal", 1, tfloat32, tfloat32, "{src0} != {src1}",
|
|
"{src0} || {src1}", "{src} ? 1.0f : 0.0f")
|
|
|
|
# These comparisons for integer-less hardware return 1.0 and 0.0 for true
|
|
# and false respectively
|
|
|
|
binop("slt", tfloat32, "", "(src0 < src1) ? 1.0f : 0.0f") # Set on Less Than
|
|
binop("sge", tfloat32, "", "(src0 >= src1) ? 1.0f : 0.0f") # Set on Greater or Equal
|
|
binop("seq", tfloat32, commutative, "(src0 == src1) ? 1.0f : 0.0f") # Set on Equal
|
|
binop("sne", tfloat32, commutative, "(src0 != src1) ? 1.0f : 0.0f") # Set on Not Equal
|
|
|
|
|
|
binop("ishl", tint, "", "src0 << src1")
|
|
binop("ishr", tint, "", "src0 >> src1")
|
|
binop("ushr", tuint, "", "src0 >> src1")
|
|
|
|
# bitwise logic operators
|
|
#
|
|
# These are also used as boolean and, or, xor for hardware supporting
|
|
# integers.
|
|
|
|
|
|
binop("iand", tuint, commutative + associative, "src0 & src1")
|
|
binop("ior", tuint, commutative + associative, "src0 | src1")
|
|
binop("ixor", tuint, commutative + associative, "src0 ^ src1")
|
|
|
|
|
|
# floating point logic operators
|
|
#
|
|
# These use (src != 0.0) for testing the truth of the input, and output 1.0
|
|
# for true and 0.0 for false
|
|
|
|
binop("fand", tfloat32, commutative,
|
|
"((src0 != 0.0f) && (src1 != 0.0f)) ? 1.0f : 0.0f")
|
|
binop("for", tfloat32, commutative,
|
|
"((src0 != 0.0f) || (src1 != 0.0f)) ? 1.0f : 0.0f")
|
|
binop("fxor", tfloat32, commutative,
|
|
"(src0 != 0.0f && src1 == 0.0f) || (src0 == 0.0f && src1 != 0.0f) ? 1.0f : 0.0f")
|
|
|
|
binop_reduce("fdot", 1, tfloat, tfloat, "{src0} * {src1}", "{src0} + {src1}",
|
|
"{src}")
|
|
|
|
binop_reduce("fdot_replicated", 4, tfloat, tfloat,
|
|
"{src0} * {src1}", "{src0} + {src1}", "{src}")
|
|
|
|
opcode("fdph", 1, tfloat, [3, 4], [tfloat, tfloat], "",
|
|
"src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w")
|
|
opcode("fdph_replicated", 4, tfloat, [3, 4], [tfloat, tfloat], "",
|
|
"src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w")
|
|
|
|
binop("fmin", tfloat, "", "fminf(src0, src1)")
|
|
binop("imin", tint, commutative + associative, "src1 > src0 ? src0 : src1")
|
|
binop("umin", tuint, commutative + associative, "src1 > src0 ? src0 : src1")
|
|
binop("fmax", tfloat, "", "fmaxf(src0, src1)")
|
|
binop("imax", tint, commutative + associative, "src1 > src0 ? src1 : src0")
|
|
binop("umax", tuint, commutative + associative, "src1 > src0 ? src1 : src0")
|
|
|
|
# Saturated vector add for 4 8bit ints.
|
|
binop("usadd_4x8", tint32, commutative + associative, """
|
|
dst = 0;
|
|
for (int i = 0; i < 32; i += 8) {
|
|
dst |= MIN2(((src0 >> i) & 0xff) + ((src1 >> i) & 0xff), 0xff) << i;
|
|
}
|
|
""")
|
|
|
|
# Saturated vector subtract for 4 8bit ints.
|
|
binop("ussub_4x8", tint32, "", """
|
|
dst = 0;
|
|
for (int i = 0; i < 32; i += 8) {
|
|
int src0_chan = (src0 >> i) & 0xff;
|
|
int src1_chan = (src1 >> i) & 0xff;
|
|
if (src0_chan > src1_chan)
|
|
dst |= (src0_chan - src1_chan) << i;
|
|
}
|
|
""")
|
|
|
|
# vector min for 4 8bit ints.
|
|
binop("umin_4x8", tint32, commutative + associative, """
|
|
dst = 0;
|
|
for (int i = 0; i < 32; i += 8) {
|
|
dst |= MIN2((src0 >> i) & 0xff, (src1 >> i) & 0xff) << i;
|
|
}
|
|
""")
|
|
|
|
# vector max for 4 8bit ints.
|
|
binop("umax_4x8", tint32, commutative + associative, """
|
|
dst = 0;
|
|
for (int i = 0; i < 32; i += 8) {
|
|
dst |= MAX2((src0 >> i) & 0xff, (src1 >> i) & 0xff) << i;
|
|
}
|
|
""")
|
|
|
|
# unorm multiply: (a * b) / 255.
|
|
binop("umul_unorm_4x8", tint32, commutative + associative, """
|
|
dst = 0;
|
|
for (int i = 0; i < 32; i += 8) {
|
|
int src0_chan = (src0 >> i) & 0xff;
|
|
int src1_chan = (src1 >> i) & 0xff;
|
|
dst |= ((src0_chan * src1_chan) / 255) << i;
|
|
}
|
|
""")
|
|
|
|
binop("fpow", tfloat, "", "bit_size == 64 ? powf(src0, src1) : pow(src0, src1)")
|
|
|
|
binop_horiz("pack_half_2x16_split", 1, tuint32, 1, tfloat32, 1, tfloat32,
|
|
"pack_half_1x16(src0.x) | (pack_half_1x16(src1.x) << 16)")
|
|
|
|
# bfm implements the behavior of the first operation of the SM5 "bfi" assembly
|
|
# and that of the "bfi1" i965 instruction. That is, it has undefined behavior
|
|
# if either of its arguments are 32.
|
|
binop_convert("bfm", tuint32, tint32, "", """
|
|
int bits = src0, offset = src1;
|
|
if (offset < 0 || bits < 0 || offset > 31 || bits > 31 || offset + bits > 32)
|
|
dst = 0; /* undefined */
|
|
else
|
|
dst = ((1u << bits) - 1) << offset;
|
|
""")
|
|
|
|
opcode("ldexp", 0, tfloat, [0, 0], [tfloat, tint], "", """
|
|
dst = (bit_size == 64) ? ldexp(src0, src1) : ldexpf(src0, src1);
|
|
/* flush denormals to zero. */
|
|
if (!isnormal(dst))
|
|
dst = copysignf(0.0f, src0);
|
|
""")
|
|
|
|
# Combines the first component of each input to make a 2-component vector.
|
|
|
|
binop_horiz("vec2", 2, tuint, 1, tuint, 1, tuint, """
|
|
dst.x = src0.x;
|
|
dst.y = src1.x;
|
|
""")
|
|
|
|
# Byte extraction
|
|
binop("extract_u8", tuint, "", "(uint8_t)(src0 >> (src1 * 8))")
|
|
binop("extract_i8", tint, "", "(int8_t)(src0 >> (src1 * 8))")
|
|
|
|
# Word extraction
|
|
binop("extract_u16", tuint, "", "(uint16_t)(src0 >> (src1 * 16))")
|
|
binop("extract_i16", tint, "", "(int16_t)(src0 >> (src1 * 16))")
|
|
|
|
|
|
def triop(name, ty, const_expr):
|
|
opcode(name, 0, ty, [0, 0, 0], [ty, ty, ty], "", const_expr)
|
|
def triop_horiz(name, output_size, src1_size, src2_size, src3_size, const_expr):
|
|
opcode(name, output_size, tuint,
|
|
[src1_size, src2_size, src3_size],
|
|
[tuint, tuint, tuint], "", const_expr)
|
|
|
|
triop("ffma", tfloat, "src0 * src1 + src2")
|
|
|
|
triop("flrp", tfloat, "src0 * (1 - src2) + src1 * src2")
|
|
|
|
# Conditional Select
|
|
#
|
|
# A vector conditional select instruction (like ?:, but operating per-
|
|
# component on vectors). There are two versions, one for floating point
|
|
# bools (0.0 vs 1.0) and one for integer bools (0 vs ~0).
|
|
|
|
|
|
triop("fcsel", tfloat32, "(src0 != 0.0f) ? src1 : src2")
|
|
opcode("bcsel", 0, tuint, [0, 0, 0],
|
|
[tbool, tuint, tuint], "", "src0 ? src1 : src2")
|
|
|
|
# SM5 bfi assembly
|
|
triop("bfi", tuint32, """
|
|
unsigned mask = src0, insert = src1, base = src2;
|
|
if (mask == 0) {
|
|
dst = base;
|
|
} else {
|
|
unsigned tmp = mask;
|
|
while (!(tmp & 1)) {
|
|
tmp >>= 1;
|
|
insert <<= 1;
|
|
}
|
|
dst = (base & ~mask) | (insert & mask);
|
|
}
|
|
""")
|
|
|
|
# SM5 ubfe/ibfe assembly
|
|
opcode("ubfe", 0, tuint32,
|
|
[0, 0, 0], [tuint32, tint32, tint32], "", """
|
|
unsigned base = src0;
|
|
int offset = src1, bits = src2;
|
|
if (bits == 0) {
|
|
dst = 0;
|
|
} else if (bits < 0 || offset < 0) {
|
|
dst = 0; /* undefined */
|
|
} else if (offset + bits < 32) {
|
|
dst = (base << (32 - bits - offset)) >> (32 - bits);
|
|
} else {
|
|
dst = base >> offset;
|
|
}
|
|
""")
|
|
opcode("ibfe", 0, tint32,
|
|
[0, 0, 0], [tint32, tint32, tint32], "", """
|
|
int base = src0;
|
|
int offset = src1, bits = src2;
|
|
if (bits == 0) {
|
|
dst = 0;
|
|
} else if (bits < 0 || offset < 0) {
|
|
dst = 0; /* undefined */
|
|
} else if (offset + bits < 32) {
|
|
dst = (base << (32 - bits - offset)) >> (32 - bits);
|
|
} else {
|
|
dst = base >> offset;
|
|
}
|
|
""")
|
|
|
|
# GLSL bitfieldExtract()
|
|
opcode("ubitfield_extract", 0, tuint32,
|
|
[0, 0, 0], [tuint32, tint32, tint32], "", """
|
|
unsigned base = src0;
|
|
int offset = src1, bits = src2;
|
|
if (bits == 0) {
|
|
dst = 0;
|
|
} else if (bits < 0 || offset < 0 || offset + bits > 32) {
|
|
dst = 0; /* undefined per the spec */
|
|
} else {
|
|
dst = (base >> offset) & ((1ull << bits) - 1);
|
|
}
|
|
""")
|
|
opcode("ibitfield_extract", 0, tint32,
|
|
[0, 0, 0], [tint32, tint32, tint32], "", """
|
|
int base = src0;
|
|
int offset = src1, bits = src2;
|
|
if (bits == 0) {
|
|
dst = 0;
|
|
} else if (offset < 0 || bits < 0 || offset + bits > 32) {
|
|
dst = 0;
|
|
} else {
|
|
dst = (base << (32 - offset - bits)) >> offset; /* use sign-extending shift */
|
|
}
|
|
""")
|
|
|
|
# Combines the first component of each input to make a 3-component vector.
|
|
|
|
triop_horiz("vec3", 3, 1, 1, 1, """
|
|
dst.x = src0.x;
|
|
dst.y = src1.x;
|
|
dst.z = src2.x;
|
|
""")
|
|
|
|
def quadop_horiz(name, output_size, src1_size, src2_size, src3_size,
|
|
src4_size, const_expr):
|
|
opcode(name, output_size, tuint,
|
|
[src1_size, src2_size, src3_size, src4_size],
|
|
[tuint, tuint, tuint, tuint],
|
|
"", const_expr)
|
|
|
|
opcode("bitfield_insert", 0, tuint32, [0, 0, 0, 0],
|
|
[tuint32, tuint32, tint32, tint32], "", """
|
|
unsigned base = src0, insert = src1;
|
|
int offset = src2, bits = src3;
|
|
if (bits == 0) {
|
|
dst = 0;
|
|
} else if (offset < 0 || bits < 0 || bits + offset > 32) {
|
|
dst = 0;
|
|
} else {
|
|
unsigned mask = ((1ull << bits) - 1) << offset;
|
|
dst = (base & ~mask) | ((insert << bits) & mask);
|
|
}
|
|
""")
|
|
|
|
quadop_horiz("vec4", 4, 1, 1, 1, 1, """
|
|
dst.x = src0.x;
|
|
dst.y = src1.x;
|
|
dst.z = src2.x;
|
|
dst.w = src3.x;
|
|
""")
|
|
|
|
|