mesa/src/intel
Francisco Jerez 34a2c9ce35 intel/fs: Specify number of data components of logical URB writes via control immediate.
This is what most logical SEND messages do when they take a variable
number of components.  'inst->mlen' is expected to be zero for logical
SEND opcodes, which are expected to behave like plain arithmetic
operations, so certain automated transformations (like SIMD lowering)
can manipulate them without opcode-specific special-casing.

Guessing the number of components from 'inst->mlen' has other
disadvantages, because it requires duplicating the logic that infers
the message payload size in every use of the instruction -- Instead we
can just do the computation once during logical send lowering.  In
addition on LNL platform this causes the 'inst->mlen' field of URB
writes to have units inconsistent with every other SEND instruction,
which is likely to lead to confusion and bugs down the road.

Rework:
 * Marcin: update emit_urb_indirect_vec4_write

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
2023-09-27 23:57:25 +00:00
..
blorp blorp: fix hangs with mesh enabled 2023-09-12 02:51:31 +00:00
ci ci: update to vulkan-cts-1.3.6.3 2023-09-25 15:53:51 +00:00
common intel/common: Add sse2_args for 32-bit build when -Dsse2=false was set 2023-09-15 17:39:55 -07:00
compiler intel/fs: Specify number of data components of logical URB writes via control immediate. 2023-09-27 23:57:25 +00:00
dev intel: Sync xe_drm.h 2023-09-13 16:38:15 +00:00
ds intel/ds: avoid dropping traces when running out of shared memory 2023-09-25 13:05:45 +00:00
genxml intel/genxml: Build with gen20.xml 2023-09-21 18:24:01 +00:00
isl intel/isl: Build for Xe2 2023-09-21 18:24:01 +00:00
nullhw-layer meson: support installation tags 2023-09-11 13:00:45 +00:00
perf intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h 2023-07-28 15:36:52 +00:00
tools intel/common: Move intel_clflush.h to intel_mem.h/intel_mem.c 2023-09-06 01:39:53 +00:00
vulkan anv: Print warning that Xe2 is not supported rather than failing 2023-09-27 21:11:18 +00:00
vulkan_hasvk hasvk: Use the common GetPhysicalDeviceFeatures2 implementation 2023-09-27 23:02:29 +00:00
meson.build intel: Only build perf if drivers or tools are enabled 2023-08-31 21:53:19 +00:00