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Instead of vendoring the logic. This has a side benefit of letting NIR optimize the generated code a bit. total instructions in shared programs: 2687284 -> 2687281 (<.01%) instructions in affected programs: 532 -> 529 (-0.56%) helped: 3 HURT: 1 Inconclusive result (value mean confidence interval includes 0). total cycles in shared programs: 140711.33 -> 140711.31 (<.01%) cycles in affected programs: 2.53 -> 2.52 (-0.62%) helped: 1 HURT: 0 total fma in shared programs: 22059.44 -> 22059.39 (<.01%) fma in affected programs: 2.69 -> 2.64 (-1.74%) helped: 3 HURT: 0 total cvt in shared programs: 14659.09 -> 14659.09 (0.00%) cvt in affected programs: 1.56 -> 1.56 (0.00%) helped: 1 HURT: 1 total quadwords in shared programs: 1455408 -> 1455416 (<.01%) quadwords in affected programs: 128 -> 136 (6.25%) helped: 0 HURT: 1 Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23836> |
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|---|---|---|
| .. | ||
| bifrost | ||
| test | ||
| valhall | ||
| bi_builder.h.py | ||
| bi_helper_invocations.c | ||
| bi_layout.c | ||
| bi_liveness.c | ||
| bi_lower_divergent_indirects.c | ||
| bi_lower_swizzle.c | ||
| bi_opcodes.c.py | ||
| bi_opcodes.h.py | ||
| bi_opt_constant_fold.c | ||
| bi_opt_copy_prop.c | ||
| bi_opt_cse.c | ||
| bi_opt_dce.c | ||
| bi_opt_dual_tex.c | ||
| bi_opt_mod_props.c | ||
| bi_opt_push_ubo.c | ||
| bi_packer.c.py | ||
| bi_pressure_schedule.c | ||
| bi_print.c | ||
| bi_print_common.c | ||
| bi_print_common.h | ||
| bi_printer.c.py | ||
| bi_quirks.h | ||
| bi_ra.c | ||
| bi_test.h | ||
| bi_validate.c | ||
| bifrost.h | ||
| bifrost_compile.c | ||
| bifrost_compile.h | ||
| bifrost_isa.py | ||
| bifrost_nir.h | ||
| bifrost_nir_algebraic.py | ||
| bir.c | ||
| cmdline.c | ||
| compiler.h | ||
| gen_disasm.py | ||
| ISA.xml | ||
| meson.build | ||
| nodearray.h | ||
| Notes.txt | ||
| README.md | ||
Bifrost compiler
Register file
Defined partially in software, partially in hardware.
Blend shaders
R0 - R3: input (color #0) R4 - R7: input (color #1) R8 - R15: general purpose R48: return address
Fragment
Anything live during BLEND must respect blend shader registers.
R0 - R3: preloaded (message #0) R4 - R7: preloaded (message #1) R57 - R63: preloaded (various)
R0 - R15: general purpose (full threads) R48 - R63: general purpose (full threads)
R32 - R47: general purpose (half threads, or v6)