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mesa/src/broadcom/qpu
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Eric Anholt 028f6b327c broadcom/vc5: Add the new TMU write addresses for V3D 4.x (and r5rep). 
The V3D 3.x series of TMU writes with meaning depending on the texture
type is replaced with writes to specific registers for each texture
argument semantic.
2018-01-12 21:56:48 -08:00
..
tests broadcom/vc5: Add a test for .ifb in ADD ops. 2018-01-12 21:54:57 -08:00
meson.build meson: Use consistent style for tests 2018-01-11 15:40:02 -08:00
qpu_disasm.c broadcom/vc5: Add support for QPU pack/unpack/disasm of small immediates. 2018-01-12 21:54:18 -08:00
qpu_disasm.h broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm. 2017-10-10 11:42:04 -07:00
qpu_instr.c broadcom/vc5: Add the new TMU write addresses for V3D 4.x (and r5rep). 2018-01-12 21:56:48 -08:00
qpu_instr.h broadcom/vc5: Add the new TMU write addresses for V3D 4.x (and r5rep). 2018-01-12 21:56:48 -08:00
qpu_pack.c broadcom/vc5: Add the new tesselation opcodes in V3D 4.1. 2018-01-12 21:54:50 -08:00
qpu_validate.c broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm. 2017-10-10 11:42:04 -07:00