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2e2e6865b4
This is supposed to be set when that stage needs the PrimID sysval preloaded, except for the VS which doesn't have this bit and instead infers it from the HS or GS bit (depending on whether tess/GS is enabled). Therefore for HS, GS, and DS we should set it whenever the corresponding sysval is there. This includes adding a missing PC_HS_OUT_CNTL, which I confirmed is set when the HS reads PrimID from the VS. Note that the DS sysval is currently always enabled whenever there's a GS, if we were to fix that then we should also change the logic here. This doesn't fix anything that I know of, but aligns us more with what the blob does. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12166> |
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| .gitlab-ci | ||
| afuc | ||
| ci | ||
| common | ||
| computerator | ||
| decode | ||
| drm | ||
| drm-shim | ||
| ds | ||
| fdl | ||
| ir2 | ||
| ir3 | ||
| isa | ||
| perfcntrs | ||
| registers | ||
| rnn | ||
| vulkan | ||
| .clang-format | ||
| .dir-locals.el | ||
| .editorconfig | ||
| meson.build | ||