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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-24 06:18:10 +02:00
9ee67467c9
When using DCC some clear values don't require a cmask eliminate step. This patch adds support for black and black with alpha 1, there are other values, but I don't have access to a comprehensive list. This works by setting the cmask eliminate predicate when doing the fast clear, and later when doing the cmask elimination making sure the draws are predicated. This increases the fps on Sascha Willems deferred. Tonga: 580fps->670fps on a Tonga PRO card. Polaris 730->850fps Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
440 lines
14 KiB
C
440 lines
14 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include "radv_meta.h"
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#include "radv_private.h"
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#include "sid.h"
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static VkResult
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create_pass(struct radv_device *device)
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
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VkAttachmentDescription attachment;
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attachment.format = VK_FORMAT_UNDEFINED;
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attachment.samples = 1;
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attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
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attachment.initialLayout = VK_IMAGE_LAYOUT_GENERAL;
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attachment.finalLayout = VK_IMAGE_LAYOUT_GENERAL;
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result = radv_CreateRenderPass(device_h,
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&(VkRenderPassCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
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.attachmentCount = 1,
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.pAttachments = &attachment,
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.subpassCount = 1,
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.pSubpasses = &(VkSubpassDescription) {
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.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
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.inputAttachmentCount = 0,
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.colorAttachmentCount = 1,
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.pColorAttachments = (VkAttachmentReference[]) {
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{
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.attachment = 0,
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.layout = VK_IMAGE_LAYOUT_GENERAL,
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},
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},
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.pResolveAttachments = NULL,
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.pDepthStencilAttachment = &(VkAttachmentReference) {
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.attachment = VK_ATTACHMENT_UNUSED,
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},
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.preserveAttachmentCount = 0,
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.pPreserveAttachments = NULL,
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},
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.dependencyCount = 0,
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},
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alloc,
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&device->meta_state.fast_clear_flush.pass);
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return result;
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}
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static VkResult
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create_pipeline(struct radv_device *device,
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VkShaderModule vs_module_h)
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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struct radv_shader_module fs_module = {
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.nir = radv_meta_build_nir_fs_noop(),
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};
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if (!fs_module.nir) {
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/* XXX: Need more accurate error */
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result = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto cleanup;
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}
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const VkPipelineShaderStageCreateInfo stages[2] = {
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_VERTEX_BIT,
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.module = vs_module_h,
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.pName = "main",
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},
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
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.module = radv_shader_module_to_handle(&fs_module),
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.pName = "main",
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},
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};
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const VkPipelineVertexInputStateCreateInfo vi_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.vertexBindingDescriptionCount = 0,
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.vertexAttributeDescriptionCount = 0,
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};
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const VkPipelineInputAssemblyStateCreateInfo ia_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
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.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
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.primitiveRestartEnable = false,
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};
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const VkPipelineColorBlendStateCreateInfo blend_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
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.logicOpEnable = false,
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.attachmentCount = 1,
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.pAttachments = (VkPipelineColorBlendAttachmentState []) {
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{
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.colorWriteMask = VK_COLOR_COMPONENT_R_BIT |
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VK_COLOR_COMPONENT_G_BIT |
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VK_COLOR_COMPONENT_B_BIT |
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VK_COLOR_COMPONENT_A_BIT,
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},
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}
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};
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const VkPipelineRasterizationStateCreateInfo rs_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
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.depthClampEnable = false,
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.rasterizerDiscardEnable = false,
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.polygonMode = VK_POLYGON_MODE_FILL,
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.cullMode = VK_CULL_MODE_NONE,
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.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
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};
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&(VkGraphicsPipelineCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = 2,
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.pStages = stages,
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.pVertexInputState = &vi_state,
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.pInputAssemblyState = &ia_state,
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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.viewportCount = 1,
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.scissorCount = 1,
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},
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.pRasterizationState = &rs_state,
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.rasterizationSamples = 1,
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.sampleShadingEnable = false,
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.pSampleMask = NULL,
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.alphaToCoverageEnable = false,
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.alphaToOneEnable = false,
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},
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.pColorBlendState = &blend_state,
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.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
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.dynamicStateCount = 2,
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.pDynamicStates = (VkDynamicState[]) {
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VK_DYNAMIC_STATE_VIEWPORT,
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VK_DYNAMIC_STATE_SCISSOR,
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},
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},
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.renderPass = device->meta_state.fast_clear_flush.pass,
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.subpass = 0,
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},
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.custom_blend_mode = V_028808_CB_ELIMINATE_FAST_CLEAR,
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},
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&device->meta_state.alloc,
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&device->meta_state.fast_clear_flush.cmask_eliminate_pipeline);
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if (result != VK_SUCCESS)
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goto cleanup;
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&(VkGraphicsPipelineCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = 2,
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.pStages = stages,
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.pVertexInputState = &vi_state,
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.pInputAssemblyState = &ia_state,
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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.viewportCount = 1,
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.scissorCount = 1,
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},
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.pRasterizationState = &rs_state,
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.rasterizationSamples = 1,
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.sampleShadingEnable = false,
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.pSampleMask = NULL,
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.alphaToCoverageEnable = false,
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.alphaToOneEnable = false,
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},
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.pColorBlendState = &blend_state,
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.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
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.dynamicStateCount = 2,
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.pDynamicStates = (VkDynamicState[]) {
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VK_DYNAMIC_STATE_VIEWPORT,
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VK_DYNAMIC_STATE_SCISSOR,
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},
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},
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.renderPass = device->meta_state.fast_clear_flush.pass,
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.subpass = 0,
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},
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.custom_blend_mode = V_028808_CB_FMASK_DECOMPRESS,
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},
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&device->meta_state.alloc,
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&device->meta_state.fast_clear_flush.fmask_decompress_pipeline);
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if (result != VK_SUCCESS)
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goto cleanup_cmask;
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goto cleanup;
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cleanup_cmask:
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radv_DestroyPipeline(device_h, device->meta_state.fast_clear_flush.cmask_eliminate_pipeline, &device->meta_state.alloc);
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cleanup:
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ralloc_free(fs_module.nir);
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return result;
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}
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void
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radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device)
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{
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struct radv_meta_state *state = &device->meta_state;
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VkDevice device_h = radv_device_to_handle(device);
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VkRenderPass pass_h = device->meta_state.fast_clear_flush.pass;
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const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
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if (pass_h)
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radv_DestroyRenderPass(device_h, pass_h,
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&device->meta_state.alloc);
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VkPipeline pipeline_h = state->fast_clear_flush.cmask_eliminate_pipeline;
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if (pipeline_h) {
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radv_DestroyPipeline(device_h, pipeline_h, alloc);
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}
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pipeline_h = state->fast_clear_flush.fmask_decompress_pipeline;
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if (pipeline_h) {
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radv_DestroyPipeline(device_h, pipeline_h, alloc);
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}
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}
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VkResult
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radv_device_init_meta_fast_clear_flush_state(struct radv_device *device)
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{
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VkResult res = VK_SUCCESS;
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zero(device->meta_state.fast_clear_flush);
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struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
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if (!vs_module.nir) {
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/* XXX: Need more accurate error */
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res = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto fail;
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}
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res = create_pass(device);
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if (res != VK_SUCCESS)
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goto fail;
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VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
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res = create_pipeline(device, vs_module_h);
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if (res != VK_SUCCESS)
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goto fail;
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goto cleanup;
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fail:
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radv_device_finish_meta_fast_clear_flush_state(device);
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cleanup:
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ralloc_free(vs_module.nir);
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return res;
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}
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static void
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emit_fast_clear_flush(struct radv_cmd_buffer *cmd_buffer,
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const VkExtent2D *resolve_extent,
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bool fmask_decompress)
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{
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struct radv_device *device = cmd_buffer->device;
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VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
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VkPipeline pipeline_h;
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if (fmask_decompress)
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pipeline_h = device->meta_state.fast_clear_flush.fmask_decompress_pipeline;
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else
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pipeline_h = device->meta_state.fast_clear_flush.cmask_eliminate_pipeline;
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RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h);
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if (cmd_buffer->state.pipeline != pipeline) {
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radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
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pipeline_h);
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}
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radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) {
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.x = 0,
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.y = 0,
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.width = resolve_extent->width,
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.height = resolve_extent->height,
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.minDepth = 0.0f,
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.maxDepth = 1.0f
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});
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radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkRect2D) {
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.offset = (VkOffset2D) { 0, 0 },
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.extent = (VkExtent2D) { resolve_extent->width, resolve_extent->height },
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});
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radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
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cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_CB |
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RADV_CMD_FLAG_FLUSH_AND_INV_CB_META);
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}
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static void
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radv_emit_set_predication_state_from_image(struct radv_cmd_buffer *cmd_buffer,
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struct radv_image *image, bool value)
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{
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uint64_t va = 0;
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if (value) {
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va = cmd_buffer->device->ws->buffer_get_va(image->bo) + image->offset;
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va += image->dcc_pred_offset;
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}
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si_emit_set_predication_state(cmd_buffer, va);
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}
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/**
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*/
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void
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radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer,
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struct radv_image *image,
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const VkImageSubresourceRange *subresourceRange)
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{
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struct radv_meta_saved_state saved_state;
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struct radv_meta_saved_pass_state saved_pass_state;
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VkDevice device_h = radv_device_to_handle(cmd_buffer->device);
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VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
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uint32_t layer_count = radv_get_layerCount(image, subresourceRange);
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assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
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radv_meta_save_pass(&saved_pass_state, cmd_buffer);
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radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer);
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if (image->surface.dcc_size) {
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radv_emit_set_predication_state_from_image(cmd_buffer, image, true);
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cmd_buffer->state.predicating = true;
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}
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for (uint32_t layer = 0; layer < layer_count; ++layer) {
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struct radv_image_view iview;
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radv_image_view_init(&iview, cmd_buffer->device,
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&(VkImageViewCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
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.image = radv_image_to_handle(image),
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.viewType = radv_meta_get_view_type(image),
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.format = image->vk_format,
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.subresourceRange = {
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.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
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.baseMipLevel = 0,
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.levelCount = 1,
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.baseArrayLayer = subresourceRange->baseArrayLayer + layer,
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.layerCount = 1,
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},
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});
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VkFramebuffer fb_h;
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radv_CreateFramebuffer(device_h,
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&(VkFramebufferCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
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.attachmentCount = 1,
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.pAttachments = (VkImageView[]) {
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radv_image_view_to_handle(&iview)
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},
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.width = image->info.width,
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.height = image->info.height,
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.layers = 1
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},
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&cmd_buffer->pool->alloc,
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&fb_h);
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radv_CmdBeginRenderPass(cmd_buffer_h,
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&(VkRenderPassBeginInfo) {
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
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.renderPass = cmd_buffer->device->meta_state.fast_clear_flush.pass,
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.framebuffer = fb_h,
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.renderArea = {
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.offset = {
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0,
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0,
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},
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.extent = {
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image->info.width,
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image->info.height,
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}
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},
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.clearValueCount = 0,
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.pClearValues = NULL,
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},
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VK_SUBPASS_CONTENTS_INLINE);
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emit_fast_clear_flush(cmd_buffer,
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&(VkExtent2D) { image->info.width, image->info.height },
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image->fmask.size > 0);
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radv_CmdEndRenderPass(cmd_buffer_h);
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radv_DestroyFramebuffer(device_h, fb_h,
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&cmd_buffer->pool->alloc);
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}
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if (image->surface.dcc_size) {
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cmd_buffer->state.predicating = false;
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radv_emit_set_predication_state_from_image(cmd_buffer, image, false);
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}
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radv_meta_restore(&saved_state, cmd_buffer);
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radv_meta_restore_pass(&saved_pass_state, cmd_buffer);
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}
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