Dave Airlie 2b35b60df1 radv: move to using nir clip/cull merge pass. ... Doing this before tessellation makes doing some bits of tessellation a bit cleaner. It also cleans up a bit of the llvm generator code. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>		2017-03-30 11:04:56 +10:00
..
.gitignore	ac/debug: move .gitignore for sid_tables.h too	2017-01-13 00:37:52 +01:00
ac_binary.c	radeon/ac: make ac_shader_binary_config_start() available externally	2017-02-28 13:20:31 +11:00
ac_binary.h	ac: consistently use ifndef guards over pragma once	2017-03-22 16:55:21 +00:00
ac_debug.c	ac/debug: Decrease num_dw for type 2 NOP's.	2017-01-17 20:54:57 +01:00
ac_debug.h	ac/debug: Dump indirect buffers.	2017-01-09 21:44:08 +01:00
ac_llvm_build.c	radeonsi/ac: move get_image_intr_name to common	2017-03-07 08:17:03 +10:00
ac_llvm_build.h	radeonsi/ac: move get_image_intr_name to common	2017-03-07 08:17:03 +10:00
ac_llvm_helper.cpp	ac: fix build with LLVM 5.0svn	2017-03-22 17:54:42 +01:00
ac_llvm_util.c	radv/ac: workaround regression in llvm 4.0 release	2017-03-15 09:51:53 +10:00
ac_llvm_util.h	ac: consistently use ifndef guards over pragma once	2017-03-22 16:55:21 +00:00
ac_nir_to_llvm.c	radv: move to using nir clip/cull merge pass.	2017-03-30 11:04:56 +10:00
ac_nir_to_llvm.h	radv: rework vertex/export shader output handling	2017-03-28 17:39:59 +10:00
amd_family.h	radeonsi: add Polaris12 support (v3)	2016-12-21 15:10:03 -05:00
amd_kernel_code_t.h	radeonsi/compute: Use the HSA abi for non-TGSI compute shaders v3	2016-09-16 23:07:10 +00:00
amdgpu_id.h	amd/common: fix ASICREV_IS_POLARIS11_M for Polaris12	2017-02-28 21:44:30 +01:00
r600d_common.h	radeonsi: move sid.h/r600d_common.h to a common place.	2016-09-06 10:05:13 +10:00
sid.h	amd/common: document PREDICATION OP 3 as 64-bit bool.	2017-03-07 15:20:01 +10:00
sid_tables.py	amd: remove shebang from python scripts	2017-03-10 14:12:46 +00:00