Marek Olšák aee8ee17a5 radeonsi: change max TBO/SSBO sizes again and rework max alloc size ... Allow 1/4 of the max heap size, but maximum of 512 MB on 32-bit architectures. Reviewed-by: Mihai Preda <mhpreda@gmail.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16901>		2022-06-08 10:23:20 +00:00
..
addrlib	amd: Initialize Gfx11Lib members in constructor.	2022-05-31 03:36:53 +00:00
ci	radv/ci: update list of failures for Pitcairn	2022-06-02 17:03:59 +02:00
common	radeonsi: change max TBO/SSBO sizes again and rework max alloc size	2022-06-08 10:23:20 +00:00
compiler	radv, aco: Lower txf offset in NIR.	2022-06-08 08:13:01 +00:00
drm-shim	Use proper types for meson objects	2022-04-18 13:03:08 +03:00
llvm	ac: use ResetAllOptionOccurrences instead of ResetCommandLineParser	2022-06-07 10:29:56 +00:00
registers	amd: change chip_class naming to "enum amd_gfx_level gfx_level"	2022-05-13 14:56:22 -04:00
vulkan	radv: Implement mesh shader scratch ring.	2022-06-08 08:43:51 +00:00
.clang-format	radv: allow holes in inline push constants	2022-04-12 11:44:30 +00:00
meson.build	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00