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2a681c4f8b
Print out the kernel start pointer (KSP) and the hash of referenced shader in its headline. This saves some search in GPU hang dumps, base on the work of72bc74f0beandfd11e4b4d3An example from a decoded GPU hang dump: 0xeffeffefe19c: 0x10000002: MI_STORE_DATA_IMM 0xeffeffefe19c: 0x10000002 : Dword 0 DWord Length: 2 Force Write Completion Check : false Store Qword: 0 Use Global GTT: false 0xeffeffefe1a0: 0xffe000c0 : Dword 1 Core Mode Enable: 0 0xeffeffefe1a4: 0x0000effe : Dword 2 Address: 0xeffeffe000c0 0xeffeffefe1a8: 0x82f94895 : Dword 3 <--- No need to search here 0xeffeffefe1ac: 0x72080025 : Dword 4 Immediate Data: 2197375125 0xeffeffefe1ac: 0x72080025: COMPUTE_WALKER 0xeffeffefe1ac: 0x72080025 : Dword 0 ... body: <struct COMPUTE_WALKER_BODY> ... Interface Descriptor: <struct INTERFACE_DESCRIPTOR_DATA> ... 0xeffeffefe1f4: 0x00001f40 : Dword 0 Kernel Start Pointer: 0x00001f40 <--- No need to search here ... 0xeffeffefe244: 0x00000000 : Dword 37 Inline Data[7]: 0 Referenced compute shader (ksp: 0x1f40 hash: 0x7208002582f94895): <- ksp & hash printed here send(1) g3UD g2UD nullUD ... ugm MsgDesc: ( load, a64, d32, V64, ... add(1) g16<2>UD g2<0,1,0>UD 0x00000100UD Note: Shader hash output rquires 'ANV_DEBUG=shader-hash' when running the workload. Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40418>
92 lines
3.1 KiB
C
92 lines
3.1 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "intel_decoder.h"
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#include "intel_decoder_private.h"
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#include "compiler/gen/gen.h"
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#include "util/ralloc.h"
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static void
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ctx_disassemble_program_gen(struct intel_batch_decode_ctx *ctx,
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uint32_t ksp,
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const char *short_name,
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const char *name)
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{
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uint64_t addr = ctx->instruction_base + ksp;
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struct intel_batch_decode_bo bo = ctx_get_bo(ctx, true, addr);
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if (!bo.map)
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return;
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fprintf(ctx->fp, "\nReferenced %s (ksp: 0x%" PRIx32, name, ksp);
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if (ctx->shader_hash.last_inst &&
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!strcmp(ctx->shader_hash.last_inst->name, "MI_STORE_DATA_IMM")) {
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/* We only consider a recorded hash valid when the previously parsed
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* instruction is the token.
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*/
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fprintf(ctx->fp, " hash: 0x%" PRIx64 "): \n", ctx->shader_hash.hash);
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/* FIXME: Only the hash of the first shader is available now.
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*
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* For a targeted shader submission command which can have more than
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* one shader, the dummy MI_STORE_DATA_IMM token instruction only
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* contains the hash of the first shader. In this case, we invalidate
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* the last instruction here so that the following shaders won't be
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* printed out with the hash of the first.
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*/
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ctx->shader_hash.last_inst = NULL;
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} else {
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fprintf(ctx->fp, "):\n");
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}
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const int size = gen_find_shader_size(&ctx->devinfo, bo.map, 0, bo.size);
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if (size > 0) {
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void *tmp_ctx = ralloc_context(NULL);
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gen_decode_params decode = {
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.devinfo = &ctx->devinfo,
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.raw_bytes = bo.map,
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.raw_bytes_size = size,
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.mem_ctx = tmp_ctx,
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};
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gen_decode(&decode);
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gen_print_params print = {
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.devinfo = &ctx->devinfo,
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.fp = ctx->fp,
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.insts = decode.insts,
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.num_insts = decode.num_insts,
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.errors = decode.errors,
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.num_errors = decode.num_errors,
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.raw_bytes = bo.map,
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.raw_bytes_size = size,
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};
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gen_print(&print);
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ralloc_free(tmp_ctx);
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}
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if (ctx->shader_binary) {
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ctx->shader_binary(ctx->user_data, short_name, addr,
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bo.map, size);
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}
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}
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void
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intel_batch_decode_ctx_init_gen(struct intel_batch_decode_ctx *ctx,
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const struct intel_device_info *devinfo,
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FILE *fp, enum intel_batch_decode_flags flags,
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const char *xml_path,
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struct intel_batch_decode_bo (*get_bo)(void *,
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bool,
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uint64_t),
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unsigned (*get_state_size)(void *, uint64_t,
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uint64_t),
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void *user_data)
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{
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intel_batch_decode_ctx_init(ctx, devinfo, fp, flags, xml_path,
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get_bo, get_state_size, user_data);
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ctx->disassemble_program = ctx_disassemble_program_gen;
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}
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