mesa/src/amd/vulkan
Gustaw Smolarczyk 24815bd7b3 radv: Skip already signalled fences.
If the user created a fence with VK_FENCE_CREATE_SIGNALED_BIT set, we
shouldn't fail to wait for a fence if it was not submitted since that is
not necessary.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-10-07 09:24:09 +10:00
..
winsys/amdgpu
.gitignore
dev_icd.json.in
Makefile.am
Makefile.sources
radeon_icd.json
radv_cmd_buffer.c
radv_cs.h
radv_descriptor_set.c
radv_descriptor_set.h
radv_device.c
radv_device_info.h
radv_entrypoints_gen.py
radv_formats.c
radv_image.c
radv_meta.c
radv_meta.h
radv_meta_blit.c
radv_meta_blit2d.c
radv_meta_buffer.c
radv_meta_bufimage.c
radv_meta_clear.c
radv_meta_copy.c
radv_meta_decompress.c
radv_meta_fast_clear.c
radv_meta_resolve.c
radv_meta_resolve_cs.c
radv_pass.c
radv_pipeline.c
radv_pipeline_cache.c
radv_private.h
radv_query.c
radv_radeon_winsys.h
radv_util.c
radv_util.h
radv_wsi.c
radv_wsi.h
radv_wsi_wayland.c
radv_wsi_x11.c
si_cmd_buffer.c
vk_format.h
vk_format_layout.csv
vk_format_parse.py
vk_format_table.py