mesa/src/amd
Samuel Pitoiset 21dd086c07 radv/meta: rework creating GFX depth/stencil resolve pipelines
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30244>
2024-07-18 14:55:05 +00:00
..
addrlib amd: add GFX v11.5.2 support 2024-07-02 12:05:23 +00:00
ci radv: disable VK_EXT_sampler_filter_minmax on TAHITI and VERDE 2024-07-10 07:57:42 +00:00
common radeonsi/vcn: Support 10bit RGB for EFC input 2024-07-18 13:11:13 +00:00
compiler aco: micro optimize VALU fquantize2f16 2024-07-18 08:36:15 +00:00
drm-shim build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00
llvm as/llvm: add s_nops before the ordered add loop and s_wait_alu workaround 2024-07-13 01:32:48 +00:00
registers amd: add gfx12 register definitions 2024-05-11 22:14:05 -04:00
vpelib amd/vpelib: support VPE IP v6.1.3 2024-07-02 12:05:23 +00:00
vulkan radv/meta: rework creating GFX depth/stencil resolve pipelines 2024-07-18 14:55:05 +00:00
meson.build build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00