mesa/src/amd
Eric Engestrom 8e383e6d9e ci: set priority:low tag only on non-Marge pipelines
This allows dynamically setting the priority to avoid starving Marge.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23976>
2023-07-11 13:50:38 +00:00
..
addrlib amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16 2023-06-01 17:59:39 +00:00
ci ci: set priority:low tag only on non-Marge pipelines 2023-07-11 13:50:38 +00:00
common amd: Do shader binary alignment for prefetch at memory allocation time. 2023-07-11 12:01:45 +00:00
compiler amd: Do shader binary alignment for prefetch at memory allocation time. 2023-07-11 12:01:45 +00:00
drm-shim amd/drm-shim: use fixed-width types 2023-06-23 18:35:52 +00:00
llvm aco,ac/llvm,ac/nir,vtn: unify cube opcodes 2023-06-30 15:35:03 +00:00
registers ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT 2023-05-24 21:48:19 +00:00
vulkan amd: Do shader binary alignment for prefetch at memory allocation time. 2023-07-11 12:01:45 +00:00
meson.build meson: build radeonsi with aco 2023-05-15 02:01:10 +00:00