mesa/src/intel
Ian Romanick 907cc49c32
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brw: Calcuate divergence before brw_from_nir
We were previously assuming that potentially stale divergence data was
valid. On some paths the register pressure estimator would recalculate
this, but, as is obvious from the results, not always.

v2: Add an assertion in brw_from_nir_emit_impl to ensure we don't end
up in this situation again.

v3: Call nir_divergence_analysis from
brw_nir_lower_deferred_urb_writes. This fixes assertion failures (the
assertion added in v2) in basically every graphics shader. The
altnerative was to call it from brw_compile_vs, brw_compile_gs, and
brw_compile_tes.

shader-db:

All Intel platformms had similar results. (Lunar Lake shown)
total instructions in shared programs: 17050403 -> 17054033 (0.02%)
instructions in affected programs: 296344 -> 299974 (1.22%)
helped: 0 / HURT: 376

total cycles in shared programs: 876063126 -> 875817316 (-0.03%)
cycles in affected programs: 78627328 -> 78381518 (-0.31%)
helped: 91 / HURT: 276

LOST:   1
GAINED: 10

fossil-db:

All Intel platformms had similar results. (Lunar Lake shown)
Totals:
Instrs: 913770429 -> 916075391 (+0.25%); split: -0.00%, +0.26%
CodeSize: 14647414640 -> 14726176320 (+0.54%); split: -0.02%, +0.56%
Cycle count: 102308091527 -> 102290664775 (-0.02%); split: -0.26%, +0.24%
Spill count: 3469632 -> 3469124 (-0.01%); split: -0.08%, +0.07%
Fill count: 5007038 -> 4998674 (-0.17%); split: -0.51%, +0.34%
Max live registers: 192568853 -> 192595355 (+0.01%); split: -0.00%, +0.02%
Max dispatch width: 48713168 -> 48712880 (-0.00%); split: +0.00%, -0.00%
Non SSA regs after NIR: 140252767 -> 140253718 (+0.00%)

Totals from 223099 (11.11% of 2007586) affected shaders:
Instrs: 314077245 -> 316382207 (+0.73%); split: -0.01%, +0.75%
CodeSize: 5335583824 -> 5414345504 (+1.48%); split: -0.06%, +1.54%
Cycle count: 45868025821 -> 45850599069 (-0.04%); split: -0.58%, +0.54%
Spill count: 2062649 -> 2062141 (-0.02%); split: -0.14%, +0.11%
Fill count: 3343019 -> 3334655 (-0.25%); split: -0.76%, +0.51%
Max live registers: 36762498 -> 36789000 (+0.07%); split: -0.02%, +0.09%
Max dispatch width: 5542224 -> 5541936 (-0.01%); split: +0.03%, -0.03%
Non SSA regs after NIR: 43727142 -> 43728093 (+0.00%)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> [v1]
Fixes: 1bff4f93ca ("brw: Basic infrastructure to store convergent values as scalars")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41370>
2026-05-11 21:03:19 +00:00
..
blorp blorp: only request fp64 shader on when required 2026-05-11 08:27:14 +00:00
ci ci: Add missing rule for new trace replay config files 2026-05-11 08:02:05 +00:00
common genxml/mi: add additional bit to FF_MODE and autostrip helper 2026-03-30 11:02:27 +00:00
compiler brw: Calcuate divergence before brw_from_nir 2026-05-11 21:03:19 +00:00
decoder intel/decoder: update warning message when buildtype=release 2026-03-09 20:01:01 +00:00
dev intel/dev: Expose list of known platform names 2026-05-09 22:00:54 +00:00
ds intel/ds: Label selected draw events with vertex count 2026-05-08 19:51:48 +00:00
executor meson: make dep_lua a disabler 2025-11-21 21:48:57 +00:00
genxml anv/iris: stop using 3DSTATE_PUSH_CONSTANT_ALLOC_PS on Gfx12.5 2026-05-06 22:12:39 +00:00
isl isl: Make sure isl_device::requires_padding is always initialized 2026-05-05 19:44:06 +00:00
mda intel/mda: Use -W for color words diff and -U for regular unified diff 2026-01-28 22:11:11 +00:00
nullhw-layer build: avoid redefining unreachable() which is standard in C23 2025-07-31 17:49:42 +00:00
perf intel/ds: report when OA metrics are unavailable 2026-04-13 21:31:51 +00:00
shaders anv: add Gfx9 support VK_EXT_device_generated_commands 2026-05-06 09:49:52 +00:00
tools intel_hang_replay: Don't force scratch page on Xe KMD unless explicitly requested 2026-05-01 19:51:41 +00:00
vulkan anv: add and use a drirc option to enable FullyCovered for vkd3d 2026-05-11 18:15:50 +00:00
vulkan_hasvk blorp: Work around sampler overfetch for buffer copies 2026-05-01 19:51:41 +00:00
meson.build brw: Move into a new src/intel/compiler/brw subdirectory 2025-10-09 07:01:47 +00:00