mesa/src/intel
Lionel Landwerlin 1c243f4f8b intel/fs: avoid cmod optimization on instruction with different write_mask
I've been running into failures with tests like :

dEQP-VK.robustness.robustness2.bind.notemplate.rgba32i.unroll.nonvolatile.uniform_buffer_dynamic.no_fmt_qual.len_4.samples_1.1d.frag

With the load_global_const_block_intel NIR intrinsic, you can load a
vec8/vec16 with a predicate. The predicate is correctly uniformized to
feed into the SEND instruction's flag register.

The problem is that a series of optimization first remove the
find_live_channel and then changes the broadcast into a simple MOV
instruction, on the assumption that the first channel is always active
if there is not control flow. This is correct.

But after that the cmod optimzation will remove this instruction :

   mov.nz.f0.0(16) null:D, vgrf16+0.0<0>:D NoMask

because it seems to be equivalent to :

   cmp.g.f0.0(16) vgrf16:D, vgrf12:D, 63d

In this case vgrf16 is the predicate to the load block SEND
instruction. Since the execution mask is different between both, some
of the channels of the SEND instruction end up not being loaded or
loaded with the wrong predication and we end up with incorrect UBO
data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20852>
(cherry picked from commit a50d2fdb46)
2023-01-26 15:40:34 +00:00
..
blorp intel: Fix a hang caused by invalid dispatch enables on gfx6/7 2023-01-01 17:07:04 +00:00
ci Revert "glx: Fix drawable refcounting for naked Windows" 2022-11-30 21:12:43 +00:00
common utils: Merge util/debug.* into util/u_debug.* and remove util/debug.* 2022-11-02 07:25:39 +00:00
compiler intel/fs: avoid cmod optimization on instruction with different write_mask 2023-01-26 15:40:34 +00:00
dev utils: Merge util/debug.* into util/u_debug.* and remove util/debug.* 2022-11-02 07:25:39 +00:00
ds anv: add mesh shading tracepoints 2022-10-27 15:03:28 +00:00
genxml intel/genxml: fix width of 3DSTATE_TASK_CONTROL.MaximumNumberofThreadGroups 2022-11-02 08:56:53 +00:00
isl isl: make Wa_1806565034 conditional to non robust access 2022-12-14 20:56:54 +00:00
nullhw-layer utils: Merge util/debug.* into util/u_debug.* and remove util/debug.* 2022-11-02 07:25:39 +00:00
perf intel/perf: fix B/C counters accumulation in non query mode 2022-11-23 19:11:58 +00:00
tools intel: Convert i915 engine type to intel in tools/ common/ and ds/ 2022-10-15 20:04:51 +00:00
vulkan anv: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable 2023-01-26 15:40:33 +00:00
vulkan_hasvk hasvk: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable 2023-01-26 15:40:33 +00:00
meson.build intel: add a hasvk vulkan driver 2022-09-02 09:40:45 +00:00