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1a35acd8d9
This is the compiler for both Bifrost and Valhall, and presumably future Mali GPUs too. Give it a more generic name so we can use the bifrost/ path for something a bit more specific. For historical reasons the compiler's name is still "bifrost" and uses the prefix `bi_`. I think that's ok in the same way that i915 in the kernel supports way more than just i915. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20455>
180 lines
5.2 KiB
Python
180 lines
5.2 KiB
Python
#encoding=utf-8
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# Copyright (C) 2021 Collabora, Ltd.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice (including the next
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# paragraph) shall be included in all copies or substantial portions of the
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# Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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# IN THE SOFTWARE.
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from valhall import immediates, instructions, typesize
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from mako.template import Template
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from mako import exceptions
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SKIP = set([
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# Extra conversions
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"S8_TO_S16",
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"S8_TO_F16",
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"U8_TO_U16",
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"U8_TO_F16",
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# Saturating multiplies
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"IMUL.s32",
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"IMUL.v2s16",
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"IMUL.v4s8",
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# 64-bit support
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"IADD.u64",
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"IADD.s64",
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"ISUB.u64",
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"ISUB.s64",
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"IMULD.u64",
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"SHADDX.u64",
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"SHADDX.s64",
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"IMULD.u64",
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"CLPER.s64",
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"CLPER.u64",
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"LSHIFT_AND.i64",
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"RSHIFT_AND.i64",
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"LSHIFT_OR.i64",
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"RSHIFT_OR.i64",
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"LSHIFT_XOR.i64",
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"RSHIFT_XOR.i64",
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"ATOM.i64",
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"ATOM_RETURN.i64",
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"ATOM1_RETURN.i64",
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# CLPER widens
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"CLPER.s32",
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"CLPER.v2s16",
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"CLPER.v4s8",
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"CLPER.v2u16",
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"CLPER.v4u8",
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# VAR_TEX
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"VAR_TEX_SINGLE",
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"VAR_TEX_GATHER",
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"VAR_TEX_GRADIENT",
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"VAR_TEX_DUAL",
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"VAR_TEX_BUF_SINGLE",
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"VAR_TEX_BUF_GATHER",
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"VAR_TEX_BUF_GRADIENT",
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"VAR_TEX_BUF_DUAL",
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# Special cased
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"FMA_RSCALE_N.f32",
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"FMA_RSCALE_LEFT.f32",
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"FMA_RSCALE_SCALE16.f32",
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# Deprecated instruction
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"NOT_OLD.i32",
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"NOT_OLD.i64",
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# TODO
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"IDP.v4s8",
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"IDP.v4u8",
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"FATAN_ASSIST.f32",
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"SEG_ADD.u64",
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"TEX_DUAL",
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])
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template = """
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#include "valhall.h"
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#include "bi_opcodes.h"
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const uint32_t valhall_immediates[32] = {
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% for imm in immediates:
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${hex(imm)},
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% endfor
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};
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<%
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def ibool(x):
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return '1' if x else '0'
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def hasmod(x, mod):
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return ibool(any([x.name == mod for x in op.modifiers]))
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%>
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const struct va_opcode_info
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valhall_opcodes[BI_NUM_OPCODES] = {
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% for op in instructions:
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% if op.name not in skip:
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<%
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name = op.name
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if name == 'BRANCHZ':
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name = 'BRANCHZ.i16'
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elif name == 'CUBEFACE2':
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name = 'CUBEFACE2_V9'
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sr_control = 0
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if len(op.staging) > 0:
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sr_control = op.staging[0].encoded_flags >> 6
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%>
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[BI_OPCODE_${name.replace('.', '_').upper()}] = {
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.exact = ${hex(exact(op))}ULL,
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.srcs = {
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% for src in ([sr for sr in op.staging if sr.read] + op.srcs):
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{
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.absneg = ${ibool(src.absneg)},
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.swizzle = ${ibool(src.swizzle)},
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.notted = ${ibool(src.notted)},
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.widen = ${ibool(src.widen)},
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.lanes = ${ibool(src.lanes)},
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.halfswizzle = ${ibool(src.halfswizzle)},
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.lane = ${ibool(src.lane)},
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.combine = ${ibool(src.combine)},
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% if src.size in [8, 16, 32, 64]:
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.size = VA_SIZE_${src.size},
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% endif
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},
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% endfor
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},
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.type_size = ${typesize(op.name)},
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.has_dest = ${ibool(len(op.dests) > 0)},
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.is_signed = ${ibool(op.is_signed)},
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.unit = VA_UNIT_${op.unit},
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.nr_srcs = ${len(op.srcs)},
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.nr_staging_srcs = ${sum([sr.read for sr in op.staging])},
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.nr_staging_dests = ${sum([sr.write for sr in op.staging])},
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.clamp = ${hasmod(x, 'clamp')},
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.saturate = ${hasmod(x, 'saturate')},
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.rhadd = ${hasmod(x, 'rhadd')},
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.round_mode = ${hasmod(x, 'round_mode')},
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.condition = ${hasmod(x, 'condition')},
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.result_type = ${hasmod(x, 'result_type')},
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.vecsize = ${hasmod(x, 'vector_size')},
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.register_format = ${hasmod(x, 'register_format')},
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.slot = ${hasmod(x, 'slot')},
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.sr_count = ${hasmod(x, 'staging_register_count')},
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.sr_write_count = ${hasmod(x, 'staging_register_write_count')},
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.sr_control = ${sr_control},
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},
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% endif
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% endfor
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};
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"""
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# Exact value to be ORed in to every opcode
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def exact_op(op):
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return (op.opcode << 48) | (op.opcode2 << op.secondary_shift)
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try:
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print(Template(template).render(immediates = immediates, instructions = instructions, skip = SKIP, exact = exact_op, typesize = typesize))
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except:
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print(exceptions.text_error_template().render())
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