mesa/src/amd
Samuel Pitoiset 16d0b868c6 radv: add the perf counters BO to the preambles BO list
If the submission isn't chained for any reasons, we might end by
submitting the performance counter preambles without a command
buffer that added this BO to its list.

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22627>
2023-04-24 06:45:23 +00:00
..
addrlib amd: update addrlib 2023-03-29 20:36:09 +00:00
ci Revert "ci/radv: Demote navi21 to manual until recent flakiness resolves." 2023-04-21 18:47:14 +00:00
common nir: add next_stage parameter to nir_remove_varying 2023-04-19 21:42:11 +00:00
compiler aco: fix nir_f2u64 translation 2023-04-20 06:32:15 +00:00
drm-shim amd: fix typos 2023-04-13 23:08:22 +00:00
llvm ac/llvm,radeonsi: lower nir_load_point_coord_maybe_flipped in nir 2023-04-19 01:59:02 +00:00
registers amd/registers: use gfx9 packet definitions for gfx940 2023-04-06 15:00:54 +00:00
vulkan radv: add the perf counters BO to the preambles BO list 2023-04-24 06:45:23 +00:00
.clang-format amd: Add radv_foreach_stage to ForEachMacros. 2023-03-27 08:29:35 +00:00
meson.build meson: build radeon drm-shim also for r300 and r600 2022-11-16 14:37:47 +00:00