Jason Ekstrand 157faa407f i965/tex: Use blorp texture upload for all CCS_E textures ... This improves the FillTex benchmark in GLBench 2.7 by 30% on my Broxton. On Ken's Broxton which only has single-channel ram, it improves by 210%. v2 (Ken): Check mt->aux_usage == ISL_AUX_USAGE_CCS_E rather than using intel_miptree_is_lossless_compressed(). Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>		2017-10-12 19:58:40 -07:00
..
amd	radv: take unsafe_math and sisched into account when hashing shaders.	2017-10-12 23:46:55 +01:00
broadcom	broadcom/vc5: Don't pair VPMSETUP with other peripheral access.	2017-10-12 10:41:09 -07:00
compiler	nir: Make nir_shader_gather_info() track texelFetch texture accesses.	2017-10-12 17:22:42 -07:00
egl	egl_haiku: drop haiku_egl_driver struct	2017-10-12 14:55:10 +01:00
gallium	broadcom/vc5: Remove the u_resource_vtbl usage.	2017-10-12 12:44:27 -07:00
gbm	meson: build gbm	2017-10-09 13:42:44 -07:00
getopt
glx	meson: Add support for configuring dri drivers directory.	2017-10-09 13:42:44 -07:00
gtest	meson: convert gtest to an internal dependency	2017-10-03 10:02:08 -07:00
hgl
intel	meson: fix typo in isl	2017-10-12 09:39:07 -07:00
loader	meson: build glx	2017-10-09 13:42:44 -07:00
mapi	mapi: Update extension number of MESA_tile_raster_order.	2017-10-12 12:44:51 -07:00
mesa	i965/tex: Use blorp texture upload for all CCS_E textures	2017-10-12 19:58:40 -07:00
util	radv: create on-disk shader cache	2017-10-12 08:52:38 +11:00
vulkan	vulkan: util: add macros to extract extension/offset number from enums	2017-10-06 11:45:41 +01:00
git_sha1.h.in	meson: Build i965 and dri stack	2017-10-09 13:42:44 -07:00
Makefile.am	configure: Add the new "vc5" driver to the list, requiring a simulator.	2017-10-10 11:42:04 -07:00
meson.build	meson: build gbm	2017-10-09 13:42:44 -07:00
SConscript	scons: use python3-compatible print()	2017-09-25 11:57:12 +01:00