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This pass combines the LOD or LOD bias and array index into a single 32-bit value since Xe2+ sampler messages requires us to do that. v2: (Alyssa) - Use nir_iand_imm instead of nir_iand and nir_imm_int - Use nir_trim_vector instead of nir_swizzle Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27458>
133 lines
4.5 KiB
C
133 lines
4.5 KiB
C
/*
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* Copyright © 2024 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "compiler/nir/nir_builder.h"
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#include "brw_nir.h"
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/**
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* Pack either the explicit LOD or LOD bias and the array index together.
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*/
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static bool
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pack_lod_and_array_index(nir_builder *b, nir_tex_instr *tex)
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{
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/* If 32-bit texture coordinates are used, pack either the explicit LOD or
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* LOD bias and the array index into a single (32-bit) value.
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*/
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int lod_index = nir_tex_instr_src_index(tex, nir_tex_src_lod);
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if (lod_index < 0) {
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lod_index = nir_tex_instr_src_index(tex, nir_tex_src_bias);
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/* The explicit LOD or LOD bias may not be found if this lowering has
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* already occured. The explicit LOD may also not be found in some
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* cases where it is zero.
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*/
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if (lod_index < 0)
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return false;
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}
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assert(nir_tex_instr_src_type(tex, lod_index) == nir_type_float);
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/* Also do not perform this packing if the explicit LOD is zero. */
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if (tex->op == nir_texop_txl &&
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nir_src_is_const(tex->src[lod_index].src) &&
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nir_src_as_float(tex->src[lod_index].src) == 0.0) {
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return false;
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}
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const int coord_index = nir_tex_instr_src_index(tex, nir_tex_src_coord);
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assert(coord_index >= 0);
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nir_def *lod = tex->src[lod_index].src.ssa;
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nir_def *coord = tex->src[coord_index].src.ssa;
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assert(nir_tex_instr_src_type(tex, coord_index) == nir_type_float);
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if (coord->bit_size < 32)
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return false;
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b->cursor = nir_before_instr(&tex->instr);
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/* First, combine the two values. The packing format is a little weird.
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* The explicit LOD / LOD bias is stored as float, as normal. However, the
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* array index is converted to an integer and smashed into the low 9 bits.
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*/
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const unsigned array_index = tex->coord_components - 1;
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nir_def *clamped_ai =
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nir_umin(b,
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nir_f2u32(b, nir_fround_even(b, nir_channel(b, coord,
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array_index))),
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nir_imm_int(b, 511));
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nir_def *lod_ai = nir_ior(b, nir_iand_imm(b, lod, 0xfffffe00), clamped_ai);
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/* Second, replace the coordinate with a new value that has one fewer
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* component (i.e., drop the array index).
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*/
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nir_def *reduced_coord = nir_trim_vector(b, coord, 2);
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tex->coord_components--;
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/* Finally, remove the old sources and add the new. */
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nir_src_rewrite(&tex->src[coord_index].src, reduced_coord);
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nir_tex_instr_remove_src(tex, lod_index);
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nir_tex_instr_add_src(tex, nir_tex_src_backend1, lod_ai);
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return true;
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}
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static bool
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brw_nir_lower_texture_instr(nir_builder *b, nir_instr *instr, void *cb_data)
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{
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if (instr->type != nir_instr_type_tex)
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return false;
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const struct brw_nir_lower_texture_opts *opts = cb_data;
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nir_tex_instr *tex = nir_instr_as_tex(instr);
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switch (tex->op) {
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case nir_texop_txl:
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case nir_texop_txb:
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if (tex->is_array &&
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tex->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
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opts->combined_lod_and_array_index) {
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return pack_lod_and_array_index(b, tex);
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}
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return false;
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default:
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/* Nothing to do */
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return false;
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}
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return false;
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}
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bool
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brw_nir_lower_texture(nir_shader *shader,
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const struct brw_nir_lower_texture_opts *opts)
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{
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return nir_shader_instructions_pass(shader,
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brw_nir_lower_texture_instr,
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nir_metadata_none,
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(void *)opts);
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}
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