mesa/src/amd
Samuel Pitoiset 1173058002 radv: add a new mechanism for tracking registers per cmdbuf
We already track a couple of registers per cmdbuf and this introduces
a generic mechanism, instead of having a bunch of last_xxx fields.

Loosely based on RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28644>
2024-05-08 11:45:52 +00:00
..
addrlib amd: fix addrlib regression 2024-03-22 08:25:21 +00:00
ci ci: identify and label S3 buckets 2024-05-07 22:08:07 +00:00
common ac/nir: explicitly use pack_half_2x16_rtz 2024-05-04 15:01:44 +00:00
compiler aco: add support for remapping color attachments 2024-05-07 10:35:04 +00:00
drm-shim amd: Use align64 instead of ALIGN for 64 bit value parameter 2024-01-03 22:02:17 +00:00
llvm ac/llvm: always trim components of texture instructions, trim DMASK 2024-04-24 19:17:09 +00:00
registers amd/registers: add correct gfx11.x enums for BINNING_MODE 2024-03-11 23:36:55 +00:00
vpelib amd/vpelib: Bypass de/regam on HLG 2024-05-07 20:43:02 +00:00
vulkan radv: add a new mechanism for tracking registers per cmdbuf 2024-05-08 11:45:52 +00:00
meson.build amd,radeonsi: add libvpe 2023-12-01 00:23:38 +00:00