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7eeb0fec8d
This is the minimum required by KHR_maintenance4 and there is no
reason we can't support this.
The only restriction we have is that the texture state base
address (which comes into play with texel buffers) must be aligned
to 4-bits, but this doesn't restrict the size of the buffer, only
its base address, and we already have requirements for buffer
alignment that ensure this.
Fixes: dEQP-VK.api.info.vulkan1p3_limits_validation.khr_maintenance4
Fixes: 2c388c1d ('v3dv: set maxBufferSize property')
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18748>
69 lines
2.2 KiB
C
69 lines
2.2 KiB
C
/*
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* Copyright © 2019 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef V3D_LIMITS_H
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#define V3D_LIMITS_H
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/* Number of channels a QPU thread executes in parallel. Also known as
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* gl_SubGroupSizeARB.
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*/
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#define V3D_CHANNELS 16
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#define V3D_MAX_FS_INPUTS 64
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#define V3D_MAX_GS_INPUTS 64
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#define V3D_MAX_VS_INPUTS 64
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#define V3D_MAX_ANY_STAGE_INPUTS MAX3(V3D_MAX_VS_INPUTS, \
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V3D_MAX_GS_INPUTS, \
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V3D_MAX_FS_INPUTS)
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#define V3D_MAX_TEXTURE_SAMPLERS 24
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#define V3D_MAX_SAMPLES 4
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#define V3D_MAX_DRAW_BUFFERS 4
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#define V3D_MAX_POINT_SIZE 512.0f
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#define V3D_MAX_LINE_WIDTH 32
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#define V3D_MAX_BUFFER_RANGE (1 << 30)
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/* Sub-pixel precission bits in the rasterizer */
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#define V3D_COORD_SHIFT 6
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/* Size of a cache line */
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#define V3D_NON_COHERENT_ATOM_SIZE 256
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/* Minimum alignment for texel buffers */
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#define V3D_TMU_TEXEL_ALIGN 64
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#define V3D_MAX_IMAGE_DIMENSION 4096
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/* The HW can do 16384 (15), but we run into hangs when we expose that. Also,
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* since we are only exposing images up to 4096 pixels per dimension 13 is
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* all we need.
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*/
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#define V3D_MAX_MIP_LEVELS 13
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#define V3D_MAX_ARRAY_LAYERS 2048
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#endif /* V3D_LIMITS_H */
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