Samuel Pitoiset 0fd40af59f radv: allow to conditionally read HTILE value when copying VRS rates ... When a subpass is bound without a VRS attachment, the driver has to create one internally and the copy can be a write only operation. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12243>		2021-09-02 19:39:04 +00:00
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addrlib	amd/addrlib: expose CMASK address equations to drivers on GFX10+	2021-08-05 06:37:09 +00:00
ci	ci: update the list of skipped tests for Fiji/RADV	2021-08-26 09:09:47 +00:00
common	ac/nir/nggc: Move gs_alloc_req up in NGG culling shaders.	2021-09-01 14:45:14 +00:00
compiler	aco: preserve subdword RC when lowering p_insert/p_extract	2021-09-02 20:39:17 +02:00
llvm	ac/llvm: fix huge alignment when loading from shared memory	2021-08-31 09:56:27 +02:00
registers	python: drop python2 support	2021-08-14 21:44:32 +00:00
vulkan	radv: allow to conditionally read HTILE value when copying VRS rates	2021-09-02 19:39:04 +00:00
.clang-format	radv: Add clang-format for AMD code.	2021-04-10 03:31:32 +02:00
meson.build	aco: add framework for unit testing	2020-07-30 16:13:08 +00:00