mesa/src/freedreno/computerator/examples
Danylo Piliaiev 5d377f435b freedreno/a6xx: Add EARLYPREAMBLE flag to all a6xx_sp_xs_ctrl_reg0
Each shader stage has its own "early preamble" flag.

Early preamble is likely an optimization to hide some of latency
when loading UBOs into consts in the preamble.

Early preamble has the following limitations:
- Only shared, a1, and consts regs could be used
  (accessing other regs would result in GPU fault);
- No cat5/cat6, only stc/ldc variants are working;
- Values writen to shared regs are not accessible by the rest
  of the shader;
- Instructions before shps are also considered to be a part of
  early preamble.

Note, for all shaders from d3d11 games blob produced preambles
compatible with early preamble mode.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15901>
2022-05-18 11:17:47 +00:00
..
branch.asm
early_preamble.asm freedreno/a6xx: Add EARLYPREAMBLE flag to all a6xx_sp_xs_ctrl_reg0 2022-05-18 11:17:47 +00:00
invocationid.asm
pvtmem.asm freedreno/computerator: Add support for pvtmem 2021-09-01 19:26:41 +00:00
simple.asm
stg_ldg_offset.asm ir3: add ldg.a,stg.a which allow complex in-place offset calculation 2021-06-25 15:39:51 +00:00
test-flut.sh freedreno/computerator: Add script to probe FLUT values 2021-07-13 14:40:30 +00:00
test-opcodes.sh
test-regfile.sh freedreno/computerator: Add script for finding reg file size 2021-03-22 18:03:16 +00:00