Jason Ekstrand 951cf94521 nir: Add explicit signs to image min/max intrinsics ... This better matches all the other atomic intrinsics such as those for SSBOs and shared variables where the sign is part of the intrinsic opcode. Both generators (GLSL and SPIR-V) know the sign from the type of the image variable or handle. In SPIR-V, signed min/max are separate opcodes from unsigned. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>		2019-08-21 17:19:55 +00:00
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drm	freedreno/drm: convert ring_pool to child_pool	2019-08-02 10:24:14 -07:00
drm-shim	freedreno: Add support for drm-shim.	2019-07-25 08:56:19 -07:00
ir3	nir: Add explicit signs to image min/max intrinsics	2019-08-21 17:19:55 +00:00
registers	freedreno: update registers	2019-08-02 10:24:14 -07:00
vulkan	spirv: Drop lower_workgroup_access_to_offsets	2019-08-10 22:15:35 -07:00
.dir-locals.el	freedreno: Make emacs indent the way robclark's eclipse does.	2019-05-13 15:37:01 -07:00
.editorconfig	freedreno: Make .editorconfig match .dir-locals.el.	2019-05-13 15:37:01 -07:00
Android.drm.mk	mesa: android: freedreno: build libfreedreno_{drm,ir3} static libs	2019-05-06 11:29:26 +00:00
Android.ir3.mk	mesa: android: freedreno: build libfreedreno_{drm,ir3} static libs	2019-05-06 11:29:26 +00:00
Android.mk	freedreno: Generate headers from xml files	2019-07-10 22:05:02 +00:00
Android.registers.mk	mesa: freedreno: Android.registers.mk: Fix up register xml.h file generation	2019-08-07 02:18:38 +00:00
Makefile.sources	mesa: Add ir3/ir3_nir_imul.c generation to Android.mk	2019-08-07 02:18:19 +00:00
meson.build	freedreno: Add support for drm-shim.	2019-07-25 08:56:19 -07:00