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mesa/src/nouveau/codegen
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Karol Herbst f2b7c4ce29 nir: rework and fix rotate lowering 
No driver supports urol/uror on all bit sizes. Intel gen11+ only for 16
and 32 bit, Nvidia GV100+ only for 32 bit. Etnaviv can support it on 8,
16 and 32 bit.

Also turn the `lower` into a `has` option as only two drivers actually
support `uror` and `urol` at this momemt.

Fixes crashes with CL integer_rotate on iris and nouveau since we emit
urol for `rotate`.

v2: always lower 64 bit

Fixes: fe0965afa6 ("spirv: Don't use libclc for rotate")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by (Intel and nir): Ian Romanick <ian.d.romanick@intel.com>

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27090>
2024-01-22 10:27:44 +00:00
..
lib nouveau: const cleanup 2022-09-16 14:23:47 +00:00
meson.build nv/codegen: Merge from_common into from_nir 2023-08-22 10:42:24 -04:00
nv50_ir.cpp nv/codegen: Use nir_lower_clip 2023-08-19 15:34:28 +00:00
nv50_ir.h nv/codegen: Delete copy and assign 2023-08-26 11:04:02 -04:00
nv50_ir_bb.cpp nv/codegen: Remove Function::buildDefSets 2023-08-22 10:42:24 -04:00
nv50_ir_build_util.cpp nouveau: Drop BuildUtil::DataArray 2023-07-21 02:40:35 +00:00
nv50_ir_build_util.h nouveau: Drop BuildUtil::Location 2023-07-21 02:40:36 +00:00
nv50_ir_driver.h nouveau/codegen: Add a 4th optimization level for MemoryOpts 2023-08-21 14:26:34 +00:00
nv50_ir_emit_gk110.cpp nv/codegen: Delete unused OP_CONSTRAINT 2023-08-22 10:42:24 -04:00
nv50_ir_emit_gm107.cpp gm107/ir: fix SULDP for loads without a known format 2023-07-25 23:15:41 +00:00
nv50_ir_emit_gv100.cpp gv100/ir: noop OP_BAR for now 2022-11-09 21:21:22 +00:00
nv50_ir_emit_gv100.h
nv50_ir_emit_nv50.cpp nv/codegen: Delete unused OP_CONSTRAINT 2023-08-22 10:42:24 -04:00
nv50_ir_emit_nvc0.cpp nv/codegen: Delete unused OP_CONSTRAINT 2023-08-22 10:42:24 -04:00
nv50_ir_from_nir.cpp nir: rework and fix rotate lowering 2024-01-22 10:27:44 +00:00
nv50_ir_graph.cpp
nv50_ir_graph.h
nv50_ir_inlines.h nv50/ir: add isUnsignedIntType() and isIntType() helpers 2022-09-09 17:32:13 +02:00
nv50_ir_lowering_gm107.cpp
nv50_ir_lowering_gm107.h nv50/ir: resolve -Woverloaded-virtual=1 warnings 2023-06-15 18:48:10 +00:00
nv50_ir_lowering_gv100.cpp
nv50_ir_lowering_gv100.h
nv50_ir_lowering_helper.cpp nv50/ir: handle U8/U16 integers converting to U64 2022-09-09 17:32:30 +02:00
nv50_ir_lowering_helper.h
nv50_ir_lowering_nv50.cpp nv/codegen: Delete OP_WRSV 2023-08-22 10:42:24 -04:00
nv50_ir_lowering_nvc0.cpp nv/codegen: Delete OP_WRSV 2023-08-22 10:42:24 -04:00
nv50_ir_lowering_nvc0.h nv/codegen: Delete OP_WRSV 2023-08-22 10:42:24 -04:00
nv50_ir_peephole.cpp Do explicit cast to suppress clang warnings 2023-09-06 12:38:09 +00:00
nv50_ir_print.cpp nv/codegen: Delete unused OP_CONSTRAINT 2023-08-22 10:42:24 -04:00
nv50_ir_ra.cpp nv50_ir_ra: Delete unused functions 2023-08-22 10:42:24 -04:00
nv50_ir_sched_gm107.h
nv50_ir_serialize.cpp nouveau: Drop tgsi support from nv50_ir_prog_info 2023-07-21 02:40:35 +00:00
nv50_ir_ssa.cpp nouveau: Make getSize return unsigned int 2023-03-17 16:08:33 +00:00
nv50_ir_target.cpp nv/codegen: Delete unused OP_CONSTRAINT 2023-08-22 10:42:24 -04:00
nv50_ir_target.h
nv50_ir_target_gm107.cpp nv/codegen: Delete OP_POW 2023-08-21 15:34:14 +00:00
nv50_ir_target_gm107.h
nv50_ir_target_gv100.cpp
nv50_ir_target_gv100.h
nv50_ir_target_nv50.cpp nv/codegen: Delete OP_WRSV 2023-08-22 10:42:24 -04:00
nv50_ir_target_nv50.h nv50/ir: Remove few nvc0 specific defines from nv50-specific header. 2023-08-16 10:11:45 +00:00
nv50_ir_target_nvc0.cpp nv/codegen: Delete OP_WRSV 2023-08-22 10:42:24 -04:00
nv50_ir_target_nvc0.h
nv50_ir_util.cpp
nv50_ir_util.h nv/codegen: Delete copy and assign 2023-08-26 11:04:02 -04:00