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2f13723c0a
The game aliases two images. It binds a memory object to two different images, the first one being an image with 4 mips and the second with only one mip but the bind offset is incorrect. It's like it queried the first image size with different usage flags, so that DCC was disabled. Force disabling DCC for mips fixes the incorrect rendering and doesn't hurt performance. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10200 Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32190>
90 lines
2.4 KiB
C
90 lines
2.4 KiB
C
/*
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* Copyright © 2016 Red Hat.
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* Copyright © 2016 Bas Nieuwenhuizen
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*
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* based in part on anv driver which is:
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* Copyright © 2015 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef RADV_INSTANCE_H
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#define RADV_INSTANCE_H
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#include "util/simple_mtx.h"
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#include "util/xmlconfig.h"
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#include "radv_radeon_winsys.h"
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#include "vk_instance.h"
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#ifdef ANDROID_STRICT
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#define RADV_API_VERSION VK_MAKE_VERSION(1, 1, VK_HEADER_VERSION)
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#else
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#define RADV_API_VERSION VK_MAKE_VERSION(1, 3, VK_HEADER_VERSION)
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#endif
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enum radv_trace_mode {
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/** Radeon GPU Profiler */
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RADV_TRACE_MODE_RGP = 1 << VK_TRACE_MODE_COUNT,
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/** Radeon Raytracing Analyzer */
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RADV_TRACE_MODE_RRA = 1 << (VK_TRACE_MODE_COUNT + 1),
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/** Gather context rolls of submitted command buffers */
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RADV_TRACE_MODE_CTX_ROLLS = 1 << (VK_TRACE_MODE_COUNT + 2),
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};
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struct radv_instance {
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struct vk_instance vk;
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VkAllocationCallbacks alloc;
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simple_mtx_t shader_dump_mtx;
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uint64_t debug_flags;
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uint64_t perftest_flags;
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uint64_t trap_excp_flags;
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enum radeon_ctx_pstate profile_pstate;
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struct {
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struct driOptionCache options;
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struct driOptionCache available_options;
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bool enable_mrt_output_nan_fixup;
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bool disable_tc_compat_htile_in_general;
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bool disable_shrink_image_store;
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bool disable_aniso_single_level;
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bool disable_trunc_coord;
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bool disable_depth_storage;
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bool zero_vram;
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bool disable_sinking_load_input_fs;
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bool flush_before_query_copy;
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bool enable_unified_heap_on_apu;
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bool tex_non_uniform;
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bool ssbo_non_uniform;
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bool flush_before_timestamp_write;
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bool force_rt_wave64;
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bool dual_color_blend_by_location;
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bool legacy_sparse_binding;
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bool force_pstate_peak_gfx11_dgpu;
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bool clear_lds;
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bool enable_khr_present_wait;
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bool report_llvm9_version_string;
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bool vk_require_etc2;
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bool vk_require_astc;
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bool disable_dcc_mips;
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char *app_layer;
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uint8_t override_graphics_shader_version;
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uint8_t override_compute_shader_version;
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uint8_t override_ray_tracing_shader_version;
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int override_vram_size;
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int override_uniform_offset_alignment;
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} drirc;
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};
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VK_DEFINE_HANDLE_CASTS(radv_instance, vk.base, VkInstance, VK_OBJECT_TYPE_INSTANCE)
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const char *radv_get_debug_option_name(int id);
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const char *radv_get_perftest_option_name(int id);
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#endif /* RADV_INSTANCE_H */
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