mesa/src/intel/common
Ben Widawsky 2dc06e2324 i965/l3: Add explicit way size calculation for bxt
There should be no functional change here because Broxton and CHV are
both gt1. Without this code however, it might seem like broxton support
is missing.

While here, put the gt1 check in front to hopefully short-circuit the
condition for the mobile cases.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-10-05 07:57:58 -07:00
..
gen_device_info.c intel: fix compilation warning on gen_get_device_info 2016-10-04 07:38:45 +03:00
gen_device_info.h intel: fix compilation warning on gen_get_device_info 2016-10-04 07:38:45 +03:00
gen_l3_config.c i965/l3: Add explicit way size calculation for bxt 2016-10-05 07:57:58 -07:00
gen_l3_config.h intel: Pull the guts of gen7_l3_state.c into a shared helper 2016-09-03 08:23:07 -07:00
gen_sample_positions.h intel: Move Vulkan sample positions to common code 2016-09-14 17:51:16 -07:00