Commit graph

450 commits

Author SHA1 Message Date
Chia-I Wu
b653669fc5 anv: add gen9 astc workaround
gen9 does not handle denorms in void extent blocks correctly.  We need
to flush them to zero.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25800>
2023-10-25 00:06:04 +00:00
Chia-I Wu
c42b1a5a74 anv: prep for gen9 astc workaround
We will reuse astc emu for gen9 astc workaround.  This commit contains
minor cleanups and has no functional change.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25800>
2023-10-25 00:06:04 +00:00
Rohan Garg
3bf1b7deba anv: selectively enable FCV optimization for DG2
Enabling FCV on MTL breaks a number of games and benchmarks. Let's
disable it for now till we can root cause the issue.

Closes: #9987
Fixes: 26c2c9 ('anv: enable FCV for Gen12.5')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25863>
2023-10-24 19:27:14 +00:00
Rohan Garg
25a232238f anv: turn off non zero fast clears for CCS_E
This helps fix a performance regression on games such as F1 22 and RDR2.
Turning on non zero fast clears causes additional partial resolves for
these games that degrades performance. Let's turn off non zero fast
clears till we can eliminate the partial resolves.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25863>
2023-10-24 19:27:14 +00:00
Nanley Chery
4cdd3178fb anv: Meet CCS alignment reqs with dedicated allocs
At image bind time, we require BOs to meet aux-map alignment
requirements in order to enable CCS on images. This is a heuristic
controlled by anv_bo_allows_aux_map().

To improve the chances of getting a properly aligned BO, we make use of
the dedicated allocation extension. Firstly, we report to applications a
preference for dedicated memory if an image would like to use the aux
map. Secondly, we align the VMA for dedicated allocations to meet
aux-map requirements.

To make enabling modifiers much easier on integrated gfx12, report
dedicated allocations as a requirement for modifiers which specify CCS.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Nanley Chery
ee6e2bc4a3 anv: Place images into the aux-map when safe to do so
At image bind time, if an image's addresses can be placed into the
aux-map without causing conflicts with a pre-existing mapping, do so.
The code aux management code in the binding function operates on a
per-plane basis. So, use the per-plane CCS memory range from the image
rather than the CCS memory region for the entire BO.

Another way to avoid aux-map conflicts is to rely solely on having a
dedicated allocation for an image. Unfortunately, not all workloads
change their behavior when drivers report a preference for dedicated
allocations. In particular, 3DMark Wild Life Extreme does not make more
dedicated allocations and such a solution was measured to perform ~16%
worse than this solution. With this solution, I did not measure a loss
of CCS on that benchmark.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6304
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Nanley Chery
207db22117 anv: Refactor CCS disabling at image bind time
Split out the discrete and integrated implicit CCS cases. We'll do more
work in the integrated case in a future commit.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Nanley Chery
d31c62f384 anv: Wrap aux surface image binding queries
Add and use anv_image_get_aux_memory_range.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Nanley Chery
cd12eec496 anv: Allocate space for aux-map CCS in image bindings
This makes images a bit larger by reserving space to store the
compression control surface when the device uses an aux-map.

This space is not used currently because anv still maps main surface
addresses to space at the end of the anv_bo.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Nanley Chery
5e07255148 anv: Move scope of CCS binding determination
Move the determination of the image binding for CCS to a larger scope,
so that it can be reused for other aux usages in
add_aux_surface_if_supported().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>
2023-10-23 21:37:24 +00:00
Chia-I Wu
7b84c8d6ea anv: fix up image views for emulated formats
When the view format is the same as the image format, and the format is
emulated, change the format to the decompressed format.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:40 +00:00
Chia-I Wu
a73e0e9a04 anv: decompress on upload for emulated formats
Add anv_astc_emu_decompress to decompress the raw texel data to the
hidden plane.  Call anv_astc_emu_decompress from anv_CmdCopyImage2 and
anv_CmdCopyBufferToImage2.

v2: support transfer queue and add missing flushes (Lionel)

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:40 +00:00
Chia-I Wu
61e480cb54 anv: add a hidden plane for emulated formats
When an image is created with an emulated format, add a hidden plane to
the image.  The hidden plane will be used for decompressed data.

v2: assert no sparse residency

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:40 +00:00
Chia-I Wu
d5841dce60 anv: support image views with surface state stream
Add optional anv_state_stream to anv_image_view_init.  This is useful
for internal image views whose lifetimes are tied to the lifetime of a
command buffer.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:40 +00:00
Chia-I Wu
815b568ed5 anv: add anv_image_view_{init,finish}
This is a minor refactor.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:40 +00:00
Chia-I Wu
b16e803571 anv: remove unused field from anv_image_view
image_plane is unused.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:39 +00:00
Rohan Garg
26c2c96d62 anv: enable FCV for Gen12.5
Now that we have proper handling of FCV_CCS_E everywhere, we can turn
this on for Gen12.5.

This helps fix a performance regression where enabling fast
clears to non-zero values with CCS_E caused additional partial resolves,
regressing performance on certain games. Performance is helped on the
following games:
  - F1'22: +45%
  - RDR2: +6%

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25589>
2023-10-11 12:18:15 +00:00
Paulo Zanoni
6368c1445f anv/sparse: add the initial code for Sparse Resources
This giant patch implements a huge chunk of the Vulkan Sparse
Resources API. I previously had this as a nice series of many smaller
patches that evolved as the xe.ko added more features, but once I was
asked to squash some of the major reworks I realized I wouldn't be
able easily rewrite history, so I just squased basically the whole
series into a giant patch. I may end up splitting this again later if
I find a way to properly do it.

If we want to support the DX12 API through vkd3d we need to support
part of the the Sparse Resources API. If we don't, a bunch of Steam
games won't work.

For now we only support the xe.ko backend, but the vast majority of
the code is KMD-independent and so an i915.ko implementation would use
most of what's here, just extending the part that binds and unbinds
memory.

v2+: There's no way to sanely track the version history of this patch
in this commit message. Please refer to Gitlab.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23045>
2023-09-28 06:16:40 +00:00
Lionel Landwerlin
eb0c197090 anv: bound image usages to the associated queue family
When applying barriers for image transitions, we're currently
considering all possible usages of an image. But when running on a
compute only queue for example, the usage of an image will never be
one of those :
   - VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
   - VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
   - VK_IMAGE_USAGE_TRANSIENT_ATTACHMENT_BIT
   - VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
   - VK_IMAGE_USAGE_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR

Removing unused usages for the compute queue allows us to reduce the
scope of the VK_IMAGE_LAYOUT_GENERAL for example. This a bunch of
transition operation that are completely useless when dealing with
barriers on the compute queue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25092>
2023-09-08 18:05:08 +00:00
Lionel Landwerlin
4066f05fe4 anv: enable standard Y tiles
We kept those tilings disabled up to know. Now that ISL has proper
support for them, remove this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
2023-09-01 23:22:18 +00:00
Jason Ekstrand
e956f6ad30 intel/isl: Allow Ys tiling
Ys & Yf are both implemented in ISL now, we still have some Yf issues
to investigate. Instead of disabling them in ISL, we disable them in
the two drivers.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
2023-09-01 23:22:18 +00:00
Lionel Landwerlin
15648dcbba isl: add a usage flag to request 2D/3D compatible views
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
2023-09-01 23:22:17 +00:00
Lionel Landwerlin
34d5db0583 anv: add missing ISL storage usage
ISL makes a bunch of decision on programming (MOCS,
RENDER_SURFACE_STATE values) based on this flag. It's important to set
it if we're going to use an image as storage.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
2023-09-01 23:22:16 +00:00
Lionel Landwerlin
fb61bb6af4 anv: implement GetDeviceImageSubresourceLayoutKHR/GetImageSubresourceLayout2KHR
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24387>
2023-08-31 16:02:52 +03:00
Lionel Landwerlin
8b662d41b4 anv: add vkGetRenderingAreaGranularityKHR()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24387>
2023-08-31 16:02:52 +03:00
Lionel Landwerlin
4bd864c487 anv: handle new VkBufferViewUsageCreateInfoKHR
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24387>
2023-08-31 16:02:52 +03:00
Chris Spencer
280281f8f7 anv/android: Add support for AHARDWAREBUFFER_FORMAT_YV12
The default MediaCodec software video decoder returns frames in this
format.

Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24388>
2023-08-23 09:56:03 +00:00
Chris Spencer
35fddccf3f anv/android: Fix importing hardware buffers with planar formats
Currently, we try to fetch the color aspect of the format and convert that
to an ISL format, which is then used to convert the pixel stride to bytes.
This does not work with planar formats because they don't have a color
aspect, and the planes can be of different sizes anyway, so may not have
the same byte stride. Change to calculate the stride individually for each
plane.

Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24388>
2023-08-23 09:56:03 +00:00
Sagar Ghuge
20db03d32f anv,hasvk: drop unnecessary DEBUG_NO_CCS/NO_HIZ checks
Now isl_surf_supports_ccs helper handles DEBUG_NO_CCS check and
isl_surf_get_hiz_surf handles DEBUG_NO_HIZ, so we don't
need to check it everywhere.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
2023-08-17 23:49:34 +00:00
Faith Ekstrand
b9870275b1 anv: Disable CCS_E for ISL_FORMAT_YCRCB_*
We're about to start using YCRCB_NORMAL and YCRCB_SWAPUV for 8-bit
interleaved YCbCr and, while ISL claims CCS_E support, it's not well
tested and we don't think it's working yet for all of ANV's use-cases.
Disable it for now in ANV and only for YUV formats.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>
2023-08-14 23:44:19 +00:00
Lionel Landwerlin
c87d5c67d9 anv: implement VK_EXT_pipeline_robustness
v2:
 - Use vk_pipeline_robustness_state

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
2023-08-09 09:03:45 +03:00
Lionel Landwerlin
f5074adeb5 anv: enable INTEL_DEBUG=nofc
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24510>
2023-08-07 12:02:57 +03:00
Felix DeGrood
6e7718dcea anv: debug messaging for sparse texture usage
Enable sparse debug messages with INTEL_DEBUG=sparse

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24046>
2023-08-03 19:57:19 +00:00
Faith Ekstrand
1d6d775ffe anv: Use vk_buffer_view
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
2023-08-01 19:17:05 +00:00
Hyunjun Ko
e3ecba3266 anv: use ycbcr_info for P010 format
Since !24096 landed, we can just use ycbcr_info to get information
of an image of the P010 format.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24265>
2023-07-21 06:15:30 +00:00
Nanley Chery
d9bdffa708 intel: Describe modifier compression with booleans
Replace the aux_usage field with two booleans: one for render
compression and one for media compression.

This more accurately describes how CCS_E is used on gfx12. On those
platforms, the FCV feature may be enabled or disabled, but ISL's
modifier table has been using the FCV aux-usage for every gfx12 render
compression modifier. Instead, set the newly-added render compression
boolean to true.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24120>
2023-07-20 20:53:27 +00:00
Nanley Chery
569f80f2df anv: Reduce accesses of isl_mod_info->aux_usage
This field will be replaced in an upcoming patch.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24120>
2023-07-20 20:53:26 +00:00
Nanley Chery
f2dab434d8 anv: Handle explicit surface layout of DG2_RC_CCS
We're going to enable the DG2 modifier. Account for the reduced plane
count that exists with it.

Also add an assert to make it clearer that the aux in use is CCS.
Otherwise, it may not be obvious because of the generic compression
names being used here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24120>
2023-07-20 20:53:26 +00:00
Lionel Landwerlin
0e728ea7b0 anv: avoid private buffer allocations in vkGetDeviceImageMemoryRequirementsKHR
The whole point of vkGetDeviceImageMemoryRequirementsKHR is to avoid
creating an image so we should completely avoid any allocation like
the private binding.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4075dd16ab ("anv: implement vkGetDeviceImageMemoryRequirementsKHR")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23720>
2023-06-19 18:35:30 +03:00
Yiwei Zhang
c8d8961f33 anv: avoid requiring ordered memory planes for explicit import
The spec does not have such requirement, but anv requires it for
validating the offset. However, for DRM_FORMAT_YVU420, chroma channels
can be swapped upon import to match B/R channel order of
VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.

This fixes some sw codec path in Instagram when interop with gpu.

v2: fix image memory requirement for re-ordered explicit import

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net> (v1)
Reviewed-by: Matt Tuner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23643>
2023-06-15 17:53:10 +00:00
Nanley Chery
0c204277e7 intel: Rename the GFX12_CCS_E aux-usage to FCV_CCS_E
Rename the isl_aux_usage enum to clarify that it is optional on gfx125.

The new name comes from the Alchemist docs, where the feature is
referred to as "Fast Clear Optimization (FCV)".

The rename was done with this command:

   git grep -l "GFX12_CCS_E" | xargs sed -ie "s/GFX12_CCS_E/FCV_CCS_E/g"

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Mark Janes
d0669f3ede intel/dev: switch defect identifiers to use lineage numbers
Update existing workarounds when necessary to match changed
identifiers.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23226>
2023-05-30 22:13:41 +00:00
Lionel Landwerlin
25c1f325d0 anv: remove unused functions
I thought I removed those, it seems my rebase got screwed up :(

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 64f20cec28 ("anv: prepare image/buffer views for non indirect descriptors")
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23317>
2023-05-30 15:14:49 +00:00
Lionel Landwerlin
64f20cec28 anv: prepare image/buffer views for non indirect descriptors
When in direct descriptor mode, the descriptor pool buffers will hold
surface states directly. We won't allocate surface states in image &
buffer views.

Instead views will hold a packed RENDER_SURFACE_STATE ready to copied
into the descriptor buffers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Rohan Garg
8a33a1390a anv: limit non zero fast clear check to GFX12_CCS_E
TGL C0 and above can fast clear to non zero values

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22076>
2023-05-29 16:48:47 +00:00
Rohan Garg
3debf2af0c anv: set aux usage to GFX12_CCS_E if a platform needs WA 14010672564
Account for the aux usage in various places now that we set the aux
usage correctly.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22076>
2023-05-29 16:48:47 +00:00
Hyunjun Ko
ad02e21ad2 anv/image: get width/height for each plane of a surface for video decoding.
This is especially for p010 format, which isn't supported for YCbCr
conversion yet.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:02 +00:00
Hyunjun Ko
91235092ab anv/image: allow VK_IMAGE_CREATE_ALIAS_BIT with a private binding.
when the image is for video decoding.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
23c338af5d anv/image: allocate mv storage buffers for h265
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
b4b31828e0 anv/image: Add a surface usage bit for video decoding
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00