Commit graph

206289 commits

Author SHA1 Message Date
Rob Clark
f8b61c96cf rusticl: Support/ignore -qcom-accelerate-16-bit
Some apps when they see adreno just blindly stuff in this compiler arg.
Just silently ignore it.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41520>
2026-05-18 14:26:50 +00:00
Rob Clark
185c89084a freedreno/a6xx: Expose subgroup ops
This is needed for cl31

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41520>
2026-05-18 14:26:50 +00:00
Timothy Arceri
45421292f1 ac/nir/lower_tex_coord: update cursor when moving wqm coordinates
We need to update the build cursor when moving a load otherwise
subsequent loads will be using a stale cursor.

Fixes: 0ff1650662 ("ac/nir/lower_tex_coord: fix moving wqm coordinates")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15494

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41629>
2026-05-18 14:03:20 +00:00
Jon Turney
90c47206c5 glx/windows: Drop static from driwindowsCreateScreen()
> ../src/glx/driwindows_glx.c:445:1: error: static declaration of ‘driwindowsCreateScreen’ follows non-static declaration
>   445 | driwindowsCreateScreen(int screen, struct glx_display *priv, bool driver_name_is_inferred)
> ../src/glx/glxclient.h:160:20: note: previous declaration of ‘driwindowsCreateScreen’ with type ‘struct glx_screen *(int,  struct glx_display *, _Bool)’
>   160 | struct glx_screen *driwindowsCreateScreen(int screen, struct glx_display *priv, bool driver_name_is_inferred);

Since driwindowsCreateScreen() is now called directly, rather than via
function pointers in the _GLXDRIdisplay structure, it needs to be
public.

Fixes: 0d78711cfb ("glx: delete __GLXDRIdisplay")
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41421>
2026-05-18 13:33:35 +00:00
Jon Turney
d1d8902dcc glx/windows: Add GLX_USE_WINDOWSGL in new places it's needed to build libGL
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41421>
2026-05-18 13:33:35 +00:00
Jon Turney
db26f34530 glx/windows: Fix compliation after code motion to put event base in 'dri' context
> ../src/glx/driwindows_glx.c: In function ‘driwindowsCreateScreen’:
> ../src/glx/driwindows_glx.c:479:48: error: ‘dpy’ undeclared (first use in this function)

08e2985e57 moved this code from driwindowsCreateDisplay to
driwindowsCreateScreen.

Unfortunately, dpy is no longer a parameter, so we need to look it up in
glx_display struct. (Looking it up in psc->base before it's initialized
here initialized would be incorrect).

Fixes: 08e2985e57 ("glx: move driwindows_display::event_base to driwindows_context")
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41421>
2026-05-18 13:33:35 +00:00
Jon Turney
464daf978e glx/windows: Fix compilation of driwindows_glx after driscreen changed from pointer to member
> ../src/glx/driwindows_glx.c: In function ‘driwindows_create_context’:
> ../src/glx/driwindows_glx.c:122:8: error: wrong type argument to unary exclamation mark
>   122 |    if (!psc->base.driScreen)
>       |        ^
> ../src/glx/driwindows_glx.c: In function ‘driwindows_create_context_attribs’:
> ../src/glx/driwindows_glx.c:196:8: error: wrong type argument to unary exclamation mark
>   196 |    if (!psc->base.driScreen || !config_base)
>       |        ^

Since the driScreen member of driwindows_screen is now a struct, not a
pointer, checking it for non-NULL-ness like this is an error.

Fixes: 1ce9aa3d65 ("mesa_interface: replace opaque __DRIscreen with struct dri_screen everywhere")
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41421>
2026-05-18 13:33:35 +00:00
Jon Turney
2f05e96d16 glx/windows: Add stdbool.h include to 'direct GLX via WGL' implementation
These files make use of the constant 'false', but don't include
stdbool.h.

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41421>
2026-05-18 13:33:34 +00:00
Jon Turney
f9a7c50ed6 glx/windows: Avoid shadowing 'type' parameter of driwindowsCreateDrawable()
> ../src/glx/driwindows_glx.c: In function ‘driwindowsCreateDrawable’:
> ../src/glx/driwindows_glx.c:283:17: error: ‘type’ redeclared as different kind of symbol
>  283 |    unsigned int type;
>      |                 ^~~~
> ../src/glx/driwindows_glx.c:261:52: note: previous definition of ‘type’ with type ‘int’
>   261 |                          GLXDrawable drawable, int type,
>      |                                                ~~~~^~~~

Fixes: 887f5a6320 ("glx: add drawable type argument when create drawable")
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41421>
2026-05-18 13:33:34 +00:00
Matthieu Oechslin
4527b30a04 r600: Fix crash on R600/R700 with custom border color
Some checks are pending
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r600_pipe_sampler_view may be NULL. This is properly checked
when emmiting samplers on EG+, but not on R600/R700.
Fix a crash on Tesseract

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Fixes: 5bee7c0b
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41432>
2026-05-18 13:17:05 +00:00
Simon Perretta
eda401cd9a pco: drop global path for null descriptor checking
Global I/O intrinsics don't have an index offset, and can't directly be
mapped to descriptors.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41545>
2026-05-18 12:43:52 +00:00
Simon Perretta
124b30f7ba pco, pvr: finish and enable VK_KHR_workgroup_memory_explicit_layout
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41545>
2026-05-18 12:43:52 +00:00
Simon Perretta
657ecb93b5 pco: conditionally spill shared memory to global memory
Spills shared memory based on a fixed threshold, currently set to 75%.
This is to account for other usage of the common store.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41545>
2026-05-18 12:43:52 +00:00
Simon Perretta
cba2833e0d pvr, pco: store device runtime info in compiler context
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41545>
2026-05-18 12:43:52 +00:00
Simon Perretta
1821309b54 pvr, pco: add support for spilling shared memory to global memory
Add a PCO_DEBUG option to force spilling to begin with.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41545>
2026-05-18 12:43:51 +00:00
Simon Perretta
0433247dc3 pvr: consider barriers when calculating compute instances
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41545>
2026-05-18 12:43:51 +00:00
Jose Maria Casanova Crespo
14b8d02130 v3dv: assert timestamp pool BO is disjoint from dst buffer BO
The two BOs come from distjoint allocation nowadays. So they
would never share the BO handle. In case this becomes false
in the future, the BO hanldes needs to be de-duped as happens
with TFU submisions.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41616>
2026-05-18 12:26:55 +00:00
Jose Maria Casanova Crespo
87a0eac718 v3dv: avoid duplicate bo_handles between cpu_job and CSD lists
v3d_submit_cpu_ioctl() takes a separate ww_acquire_ctx for the cpu_job's
bo_handles[] and any embedded CSD's bo_handles[]; a BO appearing in both
lists makes the second lock wait on a reservation held by the first
context, deadlocking the ioctl.

We avoid adding a duplicate BO handle when it's already in the cpu_job's
list. This collided when an app suballocates an indirect VkBuffer and a
CSD bind-group VkBuffer out of one VkDeviceMemory.

Fixes: e404ccba5b ("v3dv: use the indirect CSD user extension")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41616>
2026-05-18 12:26:55 +00:00
Georg Lehmann
00016a115c aco/tests: use explicit lod in sparse texture test
Newer glslang complains about implicit derivatives being
used in compute without the extension.

Cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41597>
2026-05-18 12:03:06 +00:00
Jose Maria Casanova Crespo
e3ff5d6cdb v3dv: expose maxFragmentOutputAttachments as max_rts
V3DV hardcoded maxFragmentOutputAttachments to 4, from
V3D 4.x when V3D_MAX_RENDER_TARGETS was 4. On V3D 7.x (RPi5)
V3D_MAX_RENDER_TARGETS is 8.

WebGPU's mandatory maxColorAttachments minimum is 8, and wgpu computes
max_color_attachments as min(maxColorAttachments,
maxFragmentOutputAttachments). With the previous value V3DV capped
WebGPU clients to 4 color attachments on RPi5.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41600>
2026-05-18 11:45:10 +00:00
Jose Maria Casanova Crespo
e1c03cb4f6 v3dv: Enable KHR_shader_subgroup_extended_types
Some checks are pending
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This extension is part of Vulkan 1.2 core and the feature is already
exposed; we just weren't advertising the extension separately.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41624>
2026-05-18 11:26:11 +00:00
Daniel Schürmann
3749db73f4 nir/lower_bit_size: skip conversion for more opcodes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41388>
2026-05-18 11:01:06 +00:00
Daniel Schürmann
01c9311cfb nir/lower_bit_size: use nir_def_replace() instead of nir_def_rewrite_uses()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41388>
2026-05-18 11:01:06 +00:00
Daniel Schürmann
16bf0a2047 nir/lower_bit_size: use nir_builder::constant_fold_alu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41388>
2026-05-18 11:01:06 +00:00
Daniel Schürmann
bc941eb4ff nir/builder: constant-fold nir_mov_alu() if requested
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41388>
2026-05-18 11:01:06 +00:00
Lone_Wolf
4a7f2258f2 ac/llvm: fix build with LLVM 23 (MCSubtargetInfo)
See the relevant LLVM change d50631faad.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15470
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41555>
2026-05-18 10:34:48 +00:00
Nemallapudi, Jaikrishna
e47ed60ee6 intel/dev: fix timebase_scale ticks-to-ns precision loss across 2^32
Android CTS CtsGpuProfilingDataTest#testProfilingDataProducersAvailable
intermittently fails with "Render stages reported before their
VkQueueSubmit events". Root cause is in the Perfetto clock correlation:
render-stage timestamps go through intel_device_info_timebase_scale()
while VkQueueSubmit packets use BOOTTIME directly, so any drift in the
scaler shows up as render stages preceding their submits.

intel_device_info_timebase_scale() scales the upper and lower halves
of the raw timestamp separately and recombines them, but silently
drops the upper-half division's remainder. When the frequency doesn't
evenly divide 1e9, every wrap past 2^32 loses a fixed number of ns
and shows up as a step in Perfetto's GPU-vs-BOOTTIME snapshot offset.

Carry the upper-half remainder into the lower-half numerator before
dividing, so no precision is lost. All intermediates still fit in
uint64_t.

Cc: mesa-stable
Signed-off-by: Nemallapudi, Jaikrishna <nemallapudi.jaikrishna@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41630>
2026-05-18 10:18:00 +00:00
Georg Lehmann
0a6816d860 tgsi: delete unused lowering pass
Some checks are pending
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Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41595>
2026-05-18 08:45:53 +00:00
Calder Young
768f4782e3 spirv: Fix debugPrintfEXT not working with multiple arguments
The struct field offsets weren't getting initialized.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41590>
2026-05-18 08:21:19 +00:00
Lorenzo Rossi
b333c9bd71 pan/bi: Add a printing helper for pan_varying_layout
This is just something I had to type again and again to figure out
layout bugs, maybe it's better to just write it once and leave it
disabled by default. Right now it's not printing nir_alu_type since the
printing functions are private in nir_print.c and I don't want to expose
that.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41304>
2026-05-18 08:05:42 +00:00
Lorenzo Rossi
2f63039f70 pan/bi: Add nir_fuse_io pass
This pass fuses var loads + float conversions into the loads.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41304>
2026-05-18 08:05:42 +00:00
Lorenzo Rossi
1257df83f9 pan/mid/fuse_io_cvt: Disable fusion on highp
As discussed on gitlab, we should not convert before interpolation
at highp.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41304>
2026-05-18 08:05:42 +00:00
Lorenzo Rossi
8eeb5bbb52 pan/bi: Switch old license texts to SPDX
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41304>
2026-05-18 08:05:42 +00:00
Lorenzo Rossi
df8902b9ad pan/bi: Vectorize f2f16 on v10 and earlier
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41304>
2026-05-18 08:05:42 +00:00
Dave Airlie
b38df2d62d u_blitter: only set texcoord.w to sample for multisample sources
Since the change to use TXF instead of TXF_LZ, TXF takes sample
or lod on the final component, whereas before with TXF_LZ the
lod was ignored.

Don't pass in a sample if the input texture isn't multisampled.

KHR-GL46.packed_depth_stencil.blit.depth32f_stencil8
on nvk/zink

Fixes: 9440c0e1614a ("gallium/u_blitter: stop emitting TEX_LZ")
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41628>
2026-05-18 07:42:58 +00:00
Dave Airlie
98157f78b3 st: drop ununsed arguments to copy_to_staging_dest.
none of these offsets should be used.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41561>
2026-05-18 07:19:44 +00:00
Dave Airlie
3ccb83a823 st: fix get tex subimage fallback for 1D ARRAY
This doesn't fix a known problem, but I spotted it in passing.

If copy_to_staging_dest fails then we end up using the
transformed 1D_ARRAY coords when we want the originals
in the other two paths.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41561>
2026-05-18 07:19:44 +00:00
Mary Guillemard
662a346ce3 nvk: Multiply by local_size for CS invocations in DGC codepath
Some checks are pending
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We were entirely missing the local size in the accounting for CS
invocations.

Cc: mesa-stable
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41553>
2026-05-18 07:02:38 +00:00
Mary Guillemard
03510ea470 nvk: Handle host accesses barrier
We were not flushing sysmem and NVIDIA proprietary driver does.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Fixes: e1c1cdbd5f ("nvk: Implement vkCmdPipelineBarrier2 for real")
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41055>
2026-05-18 08:15:21 +02:00
Mary Guillemard
712c768f8c nvk: Handle foreign queue dependencies
Previously, we were not doing anything in case of
VK_QUEUE_FAMILY_FOREIGN_EXT while the proprietary driver would emit
invalidation or flush of sysmem caches.

This patch adds the missing handling while following what the
proprietary driver emit on various generations.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Fixes: e1c1cdbd5f ("nvk: Implement vkCmdPipelineBarrier2 for real")
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41055>
2026-05-18 08:15:20 +02:00
Benjamin Cheng
01a36c1540 radeonsi/video: Cleanup dpb buffer
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Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15492
Fixes: 26979becec ("radeonsi/video: Add video decoder using ac_video_dec")
Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41627>
2026-05-17 21:51:09 +00:00
Calder Young
f60749ff3c brw: Add support for ACCESS_CAN_REORDER memory ordering
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Passes the ACCESS_CAN_REORDER flag from NIR on to the backend so that we
can lower the loads to a non-volatile SEND. This allows the scheduler to
freely reorder them around stores or fences.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41008>
2026-05-17 19:03:24 +00:00
Calder Young
bb4878b203 brw: Allow instruction reordering around memory writes
Our scheduler is overly conservative about reordering instructions
around memory writes or fences. Fortunately, there are several simple
assumptions we can make about our IR to schedule these things a lot
more fluidly:

 * Unless its an EOT, a SEND instruction's side effects will only be
   observed through other SEND instructions

 * The effects of workgroup barriers, memory fences, and BRW_OPCODE_SYNC,
   are only used in the IR to synchronize SEND instructions

 * All other scheduler dependencies related to memory access are already
   expressed through the source and destination operands

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41008>
2026-05-17 19:03:24 +00:00
Caio Oliveira
3f8a083f28 intel/perf: Show type, data type and units in intel_perf_query_layout
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Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41623>
2026-05-17 16:21:08 +00:00
Caio Oliveira
3628d6e532 intel/perf: Add helpers to get names of enums
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41623>
2026-05-17 16:21:08 +00:00
yserrr
968a13a916 llvmpipe: fix UB and incorrect value in compute caps shift
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`1 << 31` invokes signed shift UB. When the int result is assigned
to uint64_t, sign extension produces 0xFFFFFFFF80000000 (~18 EiB)
instead of the intended 0x80000000 (2 GiB).

Use 1ull << 31 to perform the shift in unsigned 64-bit type.

The 2 GiB value matches the surrounding finite cap values and
OpenCL minimum requirements, making the original intent clear.

Detected by UBSan with piglit.

Fixes: a65b74af51 ("llvmpipe: init shader and compute caps")
Signed-off-by: yserrr <dlwognsdc610@naver.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41464>
2026-05-17 11:52:13 +00:00
Ian Romanick
e76abd1e3a nir/opt_constant_folding: Don't fight with nir_lower_bit_size
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Intel uses nir_lower_bit_size to convert 8-bit integer values to 16-bit
for most instructions. By constant folding u2u8 or i2i8 through a bcsel,
this lowering is undone.

Fixes assertion failure in fossils/parallel-rdp/small_subgroup.foz.

fossilize-replay: src/intel/compiler/brw/brw_from_nir.cpp:852: void brw_from_nir_emit_alu(nir_to_brw_state&, nir_alu_instr*, bool): Assertion `brw_type_size_bytes(op[i].type) > 1' failed.

v2: Reject all integer conversions. Suggested by Daniel Schürmann.

Fixes: f4812dc11d ("nir/opt_constant_folding: constant-fold op(bcsel(), #c) -> bcsel(.., #c1, #c2)")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41412>
2026-05-15 23:36:25 +00:00
Karol Herbst
bd465e710c Revert "rusticl: link the C++ runtime statically"
This reverts commit 528ceeb49b.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41488>
2026-05-15 22:59:58 +00:00
Karol Herbst
c3832060a4 clc: do not use std::filesystem
It seems like davinci resolve conflicts on those symbols and we got
regressions from our static libstdc++ linking workaround.

Cc: mesa-stable
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41488>
2026-05-15 22:59:58 +00:00
Collabora's Gfx CI Team
054dd22eb6 Uprev ANGLE to 7772c5602d59140204494967ba8ebdf801180054
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5e591d0365...7772c5602d

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40965>
2026-05-15 23:15:01 +02:00