Commit graph

4633 commits

Author SHA1 Message Date
Danylo Piliaiev
734bbe33cf freedreno/rddecompiler: Decompile repeated IBs
Otherwise we don't reconstruct the whole cmdstream.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25677>
2023-10-13 08:34:41 +00:00
Danylo Piliaiev
0338b14657 freedreno/rddecompiler: Use fd_dev_gen to pass gpu_id to ir3 disasm
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25677>
2023-10-13 08:34:41 +00:00
Mike Blumenkrantz
0d652c0c8d zink: shrink vectors during optimization
this avoids a number of cases where a shader was reading more components
from an input than an output was providing. functionally there was never
any issue as these read components were subsequently rewritten to use
constant data, but the read itself is a spec violation

shrinking can't be done in finalize, however, as that enables the frontend
to optimize vertex states, which seems like a good thing but ends up being
a bad thing since it may or may not be consistent across frontends and I
don't wanna deal with having to reorder i/o locations in unintuitive ways

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25433>
2023-10-12 22:01:44 +00:00
Mike Blumenkrantz
80d837cf40 ci: add a630 trace flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25684>
2023-10-12 17:59:28 +00:00
Karmjit Mahil
1c35e495d9 tu: Use common vk_subpass_dependency_is_fb_local()
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25612>
2023-10-12 09:30:07 +00:00
Danylo Piliaiev
5ad78e61d0 tu: Count a whole push consts range in constlen for PREAMBLE push consts
Either none push consts are loaded via preamble or all of them even if
shader uses a single push const.

Fixes misrenderings with Zink. Zink unconditionally declares push
consts, regardless of whether they are actually used in the shader.

Fixes: a5f0f7d4b1
("turnip,ir3: Implement A7XX push consts load via preamble")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25638>
2023-10-11 20:06:38 +00:00
Danylo Piliaiev
94af08421b ir3: Fix values of #wrmask not being compatible with ir3 parser
IR3 parser expects wrmask values to be in xyzw order.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25661>
2023-10-11 18:35:32 +00:00
Danylo Piliaiev
2717499c91 tu: Disable preamble push consts when they are not used
It's a common case for Zink which has to declare push consts in
pipeline layout, even if they are not actually used in shaders, due
to the compatibility rules.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25641>
2023-10-11 09:40:21 +00:00
Alyssa Rosenzweig
731e682cc0 freedreno/ci: Minetest
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24011>
2023-10-10 13:51:00 +00:00
Alyssa Rosenzweig
6576add3dc ir3: Model cost of phi nodes for opt_preamble
It can be beneficial to move phi nodes, even though they can often be coalesced.
Model this cost so nir_opt_preamble can make good decisions about hoisting phi
nodes (and by extension, if-statements) into the preamble.

At this point in the series, this has no effect, but it will avoid certain
shader-db regressions associated with the nir_opt_preamble changes later in the
series.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24011>
2023-10-10 13:51:00 +00:00
Alyssa Rosenzweig
bfb3eacad3 ir3: Set CAN_SPECULATE before opt_preamble
Speculating these loads is safe, but nir_opt_preamble doesn't know that. Set the
ACCESS bits appropriately to let it know.

This will avoid any code gen regression from the nir_opt_preamble change.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24011>
2023-10-10 13:51:00 +00:00
David Heidelberg
5ab60581da ci/traces: keep images for every job except the performance testing
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8354

Acked-by: Emma Anholt <emma@anholt.net>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25606>
2023-10-10 12:46:51 +00:00
Danylo Piliaiev
8fe599ed1c tu: Zero init tu_render_pass and tu_subpass for dynamic rendering
The way we init render pass related structures is dangerous with when
structs are not zero initialized - too easy to miss a field. There
were already at least two issues with it.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25592>
2023-10-10 09:42:15 +00:00
Danylo Piliaiev
964a27aa39 tu: Fix stale tu_render_pass_attachment::store_stencil with dyn rendering
Attachment initialization helpers expect zeroed memory by default.

Fixes a hang when running Subnautica with TU_DEBUG="gmem".
See: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8702#note_1932003

Fixes: ed125e6cca
("tu: Initial support for dynamic rendering")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25592>
2023-10-10 09:42:15 +00:00
Alyssa Rosenzweig
c39896b17b nir: Use getters for nir_src::parent_*
First, we need to give the parent_instr field a unique name to be able to
replace with a helper.  We have parent_instr fields for both nir_src and
nir_def, so let's rename nir_src::parent_instr in preparation for rework.

This was done with a combination of sed and manual fix-ups.

Then we use semantic patches plus manual fixups:

    @@
    expression s;
    @@

    -s->renamed_parent_instr
    +nir_src_parent_instr(s)

    @@
    expression s;
    @@

    -s.renamed_parent_instr
    +nir_src_parent_instr(&s)

    @@
    expression s;
    @@

    -s->parent_if
    +nir_src_parent_if(s)

    @@
    expression s;
    @@

    -s.renamed_parent_if
    +nir_src_parent_if(&s)

    @@
    expression s;
    @@

    -s->is_if
    +nir_src_is_if(s)

    @@
    expression s;
    @@

    -s.is_if
    +nir_src_is_if(&s)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24671>
2023-10-10 04:58:05 -04:00
David Heidelberg
e6f7fa0211 ci/freedreno: re-enable Cheza (Adreno 630) runners
Problems we're resolved.

This reverts commit 1f3446499f.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25376>
2023-10-08 07:04:34 +00:00
Mark Collins
273feeb643 tu,util/driconf: Add option to not reserve descriptor set
A descriptor set is internally reserved for descriptor set dynamic
offset which might not be used by an applications which otherwise
requires an extra descriptor set. This driconf option allows making
that trade-off by dropping support for dynamic offsets in exchange
for an extra descriptor set which means 5 usable descriptor sets on
A6XX and 8 on A7XX.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>
2023-10-07 18:15:02 +00:00
Mark Collins
5fe64837cd tu: Support higher descriptor set count for A7XX
Allows for the descriptor set count to vary at runtime depending on
the specific GPU to allow for 7 usable descriptor sets on A7XX with
one reserved for dynamic offsets.

Passing VK-CTS: dEQP-VK.binding_model.*

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>
2023-10-07 18:15:02 +00:00
Mark Collins
62921cf026 freedreno/common: Add max_sets property to A6xxGPUInfo
A7XX increases the maximum amount of descriptor sets from 5 to 8,
the amount of descriptor sets was added as a property of the
A6xxGPUInfo to accommodate it changing across GPUs.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>
2023-10-07 18:15:02 +00:00
Danylo Piliaiev
9b0960cfe3 tu/kgsl: Fix field order in kgsl_command_object init
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9942

Fixes: ec268fa5b6
("tu/kgsl: Support u_trace and perfetto")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25581>
2023-10-06 19:23:42 +00:00
Eric Engestrom
82e342888f ci: skip dEQP-VK.api.driver_properties.conformance_version for everyone
This test checks the driver's reported conformance version against the
version of the CTS we're running. This check fails every few months
and everyone has to go and bump the number in every driver.

Running this check only makes sense while preparing a conformance
submission, so skip it in the regular CI.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25519>
2023-10-06 17:37:20 +00:00
Danylo Piliaiev
7caf3e70a1 tu: Fix VK_FORMAT_A8_UNORM_KHR using UBWC when !has_8bpp_ubwc
Fixes hangs in Anno 1800 with DXVK 2.3

Fixes: 302907e347
("tu: Expose VK_KHR_maintenance5")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25567>
2023-10-05 22:36:06 +00:00
Danylo Piliaiev
47fb3f06c4 tu: Add push_consts_per_stage debug option
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25086>
2023-10-04 15:51:54 +00:00
Danylo Piliaiev
a5f0f7d4b1 turnip,ir3: Implement A7XX push consts load via preamble
New push consts loading consist of:
- Push consts are set for the entire pipeline via HLSQ_SHARED_CONSTS_IMM
  array which could fit up to 256b of push consts.
- For each shader stage that uses push consts READ_IMM_SHARED_CONSTS
  should be set in HLSQ_*_CNTL, otherwise push consts may get overwritten
  by new push consts that are set after the draw.
- Push consts are loaded into consts reg file in a shader preamble via
  stsc at the very start of the preamble.

OPC_PUSH_CONSTS_LOAD_MACRO is used instead of directly translating NIR
intrinsic into stsc because: we don't want to teach legalize pass how
to set (ss) between stores and loads of consts reg file, don't want for
stsc to be reordered, etc.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25086>
2023-10-04 15:51:54 +00:00
Danylo Piliaiev
e39b6e2b9b freedreno: Make possible to specify A7XX feature flags
Previously the idea was for each generation to have unique list
of feature flags, now it makes more sense for new generation
to have only new flags defined and "inherit" older gen flags.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25086>
2023-10-04 15:51:54 +00:00
Danylo Piliaiev
823b3bfeea ir3,tu: Refactor push consts info plumbing
In preparation for a new way to pass push consts into a shader,
introduced in a7xx.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25086>
2023-10-04 15:51:54 +00:00
Danylo Piliaiev
d5d7631060 freedreno/registers: Refine a7xx push consts registers
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25086>
2023-10-04 15:51:54 +00:00
Danylo Piliaiev
34d436fde2 tu/virtio: Fix incorrect call to tu_perfetto_submit
Virtio backend backend was not updated because it was not
compiled in CI and not compiled locally.

Fixes: 7f59e37233
("tu/perfetto: Allow gpu time to be passed into tu_perfetto_submit")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25531>
2023-10-03 17:06:26 +00:00
Danylo Piliaiev
ec95573302 tu/a7xx: Correctly record timestamps for u_trace
It was changed how CP_EVENT_WRITE works on A7XX.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25528>
2023-10-03 15:48:12 +00:00
Rob Clark
583c636ea4 freedreno: Add attach-bo debugging
Add asserts to verify that BOs referenced in cmdstream are attached to
the submit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
2023-10-03 15:18:03 +00:00
Danylo Piliaiev
ec268fa5b6 tu/kgsl: Support u_trace and perfetto
Raw GPU time is retrieved via kgsl_cmdbatch_profiling_buffer,
offseted GPU time is retrieved via KGSL_PERFCOUNTER_GROUP_ALWAYSON.
This allows to calculate GPU time offset for each submission and
synchronize CPU/GPU time domains.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12805>
2023-10-03 14:19:24 +00:00
Danylo Piliaiev
3ccd199708 tu/kgsl: Fix memory leak of tmp allocations during submissions
cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12805>
2023-10-03 14:19:24 +00:00
Danylo Piliaiev
7f59e37233 tu/perfetto: Allow gpu time to be passed into tu_perfetto_submit
In preparation to support perfetto on KGSL, on KGSL GPU time is
retrieved on submission and requires minimal post-processing.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12805>
2023-10-03 14:19:24 +00:00
Danylo Piliaiev
18a47efb80 tu/perfetto: Remove now unnecessary tu_perfetto_util
Since Turnip now uses C++ we can directly include tu_device.h
into perfetto code.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12805>
2023-10-03 14:19:24 +00:00
Jonathan Marek
90f12ce740 tu: add a TU_DEBUG=rd option for cmdstream dumping
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25246>
2023-10-02 23:31:35 +00:00
Jonathan Marek
d35922ce26 freedreno: move redump.h to common code + cleanup
remove the unused parts and add an implementation of rd_write_section

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25246>
2023-10-02 23:31:34 +00:00
Guilherme Gallo
2d66147376 ci/freedreno: Add a new flake
KHR-GLES31.core.compute_shader.simple-compute-shared_context resulted in
an UnexpectedPass during execution of the job
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/49445812

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25469>
2023-09-29 17:27:49 -03:00
wangra
e90f9d8e21 tu/kgsl: Fix bitfield of DITHER_MODE_MRT6
The enum `adreno_rb_dither_mode` needs 2 bits, change the `high` to 13 to make sure 2 bits are used for `DITHER_MODE_MRT6`

Fixes: e03259974e ("freedreno: Generate headers from xml files")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25439>
2023-09-27 21:45:40 +00:00
Connor Abbott
302907e347 tu: Expose VK_KHR_maintenance5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
b0f1cb8f31 freedreno/ci: Skip dEQP-VK.info.device_extensions
Copied from anv and radv.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
e7d4bc6095 tu: Add maintenance5 properties
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
a86f2132b3 tu: Check for DEVICE_LOST in vkGetEventStatus()
Required by maintenance5.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
b14a8dc2a7 tu: Support VkPipelineCreateFlags2CreateInfoKHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
53dbfab87b tu: Use new buffer usage flags
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
4fd12a18db tu: Implement vkGetRenderingAreaGranularityKHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
2fb42fbd42 tu: Implement vkGetImageSubresourceLayout2KHR and vkGetDeviceImageSubresourceLayoutKHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
53e518bcda tu: Implement vkCmdBindIndexBuffer2KHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
26a88fc062 tu: Allow VK_WHOLE_SIZE in tu_CmdBindVertexBuffers2EXT pSizes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
9669b48b4a tu/clear_blit: Allow VK_REMAINING_ARRAY_LAYERS as layerCount
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00
Connor Abbott
b9f673e9d4 tu/clear_blit: Fix staging image view layer count
This seems to be a mistake that didn't affect anything.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
2023-09-27 19:07:22 +00:00