Commit graph

59911 commits

Author SHA1 Message Date
Gert Wollny
f4816d2a72 r600/sfn: Add more tests and update to use address splits
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
d617052db6 r600/sfn: take address loads into account when scheduling
Also change a bit the instruction priority handling

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
8e1cf2d439 r600/sfn: Add function to check whether a group loads a index register
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
d21054b4bc r600/sfn: Add pass to split addess and index register loads
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
aca80216c1 r600/sfn: Add interface to count AR uses in ALU op
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
6e5327fef6 r600/sfn: Add a RW get function of IF predicate access
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
a7611bc093 r600/sfn: AR and IDX don't need the write flag, but haev a parent
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
cb8f12ded5 r600/sfn: Be able to track expected AR uses
Because AR emission and AR use must be in the same CF we have to
be able to track whether all AR ready are emitted.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
af3d496253 r600/sfn: Update resource based instruction index mode check
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
e7b497fe87 r600/sfn: Add function to insert op in block
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
f464fc28d4 r600/sfn: add method to update indirect address to all instrution types
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
c3f60f77d6 r600/sfn: handle AR and IDX register in shader from string
This is needed for testing

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
9a29301567 r600/sfn: Prepare uniforms and local arrays for better address handling
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
fac4760c7d r600: Allow both index registers for all CF types
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
db0752a809 r600/sfn: don't allow more than one AR per instruction
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
886a3e5286 r600/sfn: Rework query for indirect access in alu instr and opt
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
5579263368 r600/sfn: Add address and index registers creation to ValueFactory
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
a40c1c9d5c r600/sfn/tests: Cleanup and move some code around
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
c5ea9182b4 r600/sfn: Handle MOVA_INT in sfn assembler
To properly emit ALU clauses we have to make sure the backend doesn't
add instructions for the address emission.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
077f7d25df r600/sfn: don't track address registers in live ranges
There is only one address register, and for the index registers we
don't do a special register allocation, so no need to track these
either.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
bd9b653dbb r600/sfn: Add a type for address registers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Felix DeGrood
543c554ed6 iris: Enable INTEL_DEBUG_BATCH_FRAME_START/_STOP
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22564>
2023-04-28 04:37:05 +00:00
Eric Engestrom
6a08dc7cab v3d: fix tfu_supports_tex_format() param type, and document why
tex_format should be `enum V3DX(Texture_Data_Formats)`, but using that enum
type in the header requires including `v3dx_pack.h`, which triggers circular
include dependencies issues, so use a `uint32_t` for now.

"fix" the one place that was using the correct enum, because doing so
triggers `-Wenum-int-mismatch` in GCC 13 as the function declaration
doesn't match the function definition.

Reported-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22739>
2023-04-27 22:17:48 +00:00
Mike Blumenkrantz
79b3828e82 draw: fix robust ubo size calc
if the size of the constant buffer + stride overflows UINT32_MAX,
DIV_ROUND_UP will return 0, which is, in some sense, extremely robust,
but for general functionality it's not actually very robust

cc: mesa-stable

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22720>
2023-04-27 19:48:48 +00:00
Rob Clark
08ffa8e0d2 dri/android: Fix MSAA resolve
Commit f9a074dd55 ("dri2/android: Bypass throttling") dropped
unnecessary throtting in the SwapBuffers() path for android.  But
unfortunately MSAA resolve got tangled up in the throttle reason
flag.  So add a new flag that indicates "no throttingling, but yes
please do MSAA resolve".

Fixes: f9a074dd55 ("dri2/android: Bypass throttling")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22719>
2023-04-27 19:05:44 +00:00
antonino
5969541123 zink: set when pipeline dirty flag when multisample changes
Sets `gfx_pipeline_state.dirty` appropriately when
`gfx_pipeline_state.multisample` changes

Fixes: 14d5892609 ("zink: add to multisample field to `zink_gfx_pipeline_state`")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22736>
2023-04-27 16:24:51 +00:00
Thong Thai
9c4e3c9020 tgsi: use locale independent float and double parsing
The atof and strtod functions use the locale of the user when
determining if a decimal is a comma, ',' or a period, '.'. Thanks to
@fzwoch for helping find the cause of a shader-related issue.

Cc: mesa-stable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5760
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22699>
2023-04-27 15:43:33 +00:00
Ruijing Dong
306c6e12a5 frontends/va: define va av1 encoding caps
by having va av1 caps enabled, av1 vaapi encoding
is enabled.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
03c9a81959 radeonsi/vcn: use PIPE_ENC_FEATURE enum
Merge PIPE_H265_ENC_FEATURE into PIPE_ENC_FEATURE enum
because those are common flags, and it will be
used in AV1 encoder as well.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
5edbecb856 frontends/va: adding va av1 encoding functions
supported features:
- 8/10 bit encoding
- multi-layer (up to 4) encoding
- vbr/cbr rate control mode

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
35c2150988 radeonsi/vcn: add av1 encoding ib packages and get_info
add av1 encoding ib packages and enable the
get_info functions.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
4697b71c4e radeonsi/vcn: add some av1 encoding function
preparation for enabling av1 encoding in radeonsi,
adding the entropy related functioin.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
8b3295b9ed radeonsi/vcn: add av1 enc data structure
add av1 encoding related data structure.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
0b31c5a00c gallium/pipe: add av1 encoding data structure in pipe
add pipe av1 encoding data structure

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
f33f26e9ff radeonsi/vcn: add av1 dpb variables and cdf table
add av1 dpb variables and cdf table.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
b13f87031f radeonsi/vcn: remove extra zero bytes from bitstream
reason:
   extra bytes are not needed and not necessary
   in h264/h265 bitstreams, because they are in
   between NALs, the only problem is they consumed
   extra bits. And for av1 streams, that could be
   explained to something else, especially in
   multi-layer cases, that can cause syntax errors.

   ptr[6] represents the bitstream size,
   ptr[8] represents the extra zero bytes.

   The total number of bytes of the output
   should be ptr[6] - ptr[8]

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
bb08f061d9 radeonsi/vcn: merge get_output_format_param function
reason:
so far, the output_format_param function can be shared
by different encoders, and just for h264 encoder, there
is no 10bit encoding supported. This is to reduce
the repeated code before having av1 encoder.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
a4f96446fb radeonsi/vcn: enable swizzle mode in encoding ref frames.
swizzle mode in ref frames could potentially
improve encoding performance, the main reason
is just because linear mapping is the worst mode
for reference frames comparing to block level
mapping.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
0a11d5f598 radeonsi/vcn: enable 2 pass search center map
2 pass search map is a feature supported by VCN,
the main purpose is to enlarge motion search
range that in pre-encoding path the center global
motion vectors could be obtained and used in the
final path as a block center base. When 2pass is
used, this feature will be automatically enabled.

2 pass feature can be enabled by ffmpeg command
line "-compression_level 1"

and also correct some typos and move quality
package from vcn3.0 to vcn2.0 since it is availabe
in vcn2.0 and vcn3.0 can use it directly. Correct
vcn3.0 hevc spec misc IB package.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
869c34c1ca radeonsi/vcn: add macros used in av1 encoding
add macros used in av1 encoding.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Pierre-Eric Pelloux-Prayer
b4a2cb1e16 winsys/amdgpu: use the no-op helper to detect if reset completion
On older kernel the completion of the reset isn't signalled to userspace,
yet we need it to implement the EXT_robustness extension correctly.

In this situation, try to create a new context and submit a no-op job. If
the reset isn't done the kernel will reject the submission (-ECANCELED);
otherwise the submission will go through and we'll know that the reset is
done.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
45cd75cdad winsys/amdgpu: add a helper function to submit a no-op job
This will be used in the next commit.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
e528823400 radeonsi: stop reporting reset to app once gpu recovery is done
This way apps know they can recreate their contexts when
the status go back to NO_ERROR.

This depends on new UAPI in the kernel; for older kernel, radeonsi
will stop reporting a reset after 3 seconds. Apps will be able to
create new contexts but they'll have to handle not being able to
submit tasks.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7460
Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Samuel Pitoiset
94ce6540d8 ac/sqtt: add helpers for initializing ac_thread_trace_data
This is common between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Jose Fonseca
16f3e9cd76 wgl: Remove needless if (1) { ... }.
Noticed by Craig Scott on https://gitlab.freedesktop.org/mesa/mesa/-/issues/4427#note_857876

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22706>
2023-04-27 09:58:39 +00:00
Jose Fonseca
9105e771af wgl: Fix unintentional assignment on assert.
Spotted by Nanley Chery.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4427
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22706>
2023-04-27 09:58:39 +00:00
Samuel Pitoiset
f2d5b7cd1c ac/spm: rename ac_spm_trace_data to ac_spm
This is shorter and it's the main struct that controls SPM, while
ac_spm_trace contains the generated data only.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22707>
2023-04-27 07:24:54 +00:00
Samuel Pitoiset
0d4fa8e5c6 ac/spm: introduce ac_spm_trace and ac_spm_get_trace()
For more code isolation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22707>
2023-04-27 07:24:54 +00:00
Dave Airlie
e895c7ba56 radeonsi/ac: move some vcn defines to common
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Mike Blumenkrantz
dfd39d1d9d zink: enable EXT_shader_object for generic precompiles
this should match the functionality of GPL, but it should also (theoretically)
have significantly less CPU overhead, so I've enabled this to be the new
default when available

currently I'm not changing any of the requirements for shader object enablement,
so this is probably only be usable on desktops

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00