Commit graph

413 commits

Author SHA1 Message Date
Samuel Pitoiset
f3a78a9da0 radv: fix missing initialization of the conditional rendering state
This was missing when VK_EXT_conditional_rendering has been
implemented. The predication type should be -1 to avoid
restoring previous state when performing a decompression pass
with DCC enabled.

Note that we don't have to handle secondary command buffers
because we don't support this feature currently.

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-08-16 14:11:48 +02:00
Dave Airlie
5040319331 radv: fix cdw check vs tracing emit
If we have tracing enabled we could do all the tracing emits
and overflow the precalculated cdw_max.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-28 06:20:27 +10:00
Samuel Pitoiset
df679b1643 radv: allocate enough space in radv_cmd_buffer_after_draw()
The driver might emit up to 4 dwords when RADV_TRACE_FILE is
used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-27 14:31:29 +02:00
Samuel Pitoiset
c08ae911d9 radv: check CS space in radv_emit_write_data_packet()
This wasn't wrong but it looks better to me like this. It's
only used for debugging purposes (ie. RADV_TRACE_FILE).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-27 14:31:27 +02:00
Samuel Pitoiset
c118c8938c radv: reduce CB/DB meta flushes in radv_dst_access_flush()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-27 14:31:24 +02:00
Samuel Pitoiset
ce454d02cc radv: simplify a condition in radv_src_access_flush()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-20 10:17:17 +02:00
Samuel Pitoiset
0a8127bbfb radv: make use of radv_subpass_barrier() when resolving subpasses
The goal is to use radv_barrier()/radv_subpass_barrier() as
much as possible for further optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-20 10:17:11 +02:00
Bas Nieuwenhuizen
978570769d radv: Always set disable zpass increment bit when possible.
When no occlusion queries are active even if out of order is enabled.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-19 02:38:10 +02:00
Bas Nieuwenhuizen
c0144e915a radv: Disable disabled color buffers in rbplus opts.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-19 02:37:47 +02:00
Samuel Pitoiset
e45ba51ea4 radv: add support for VK_EXT_conditional_rendering
Inherited commands buffers are not supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18 13:44:09 +02:00
Samuel Pitoiset
4d99caf590 radv: set the predicate for indirect/indexed draw commands
VK_EXT_conditional_rendering allows to discard draw commands
(not only normal draws).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18 13:44:04 +02:00
Samuel Pitoiset
1e83f65673 radv: set the predicate for dispatch commands
VK_EXT_conditional_rendering allows to discard dispatch commands.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18 13:44:01 +02:00
Samuel Pitoiset
d9526384bd radv: optimize radv_stage_flush() for pre fragment shader stages
We don't need to emit PS_PARTIAL_FLUSH for the pre fragment shader
stages (ie. geometry/tessellation). Emitting VS_PARTIAL_FLUSH
is enough for these stages. Note that PS_PARTIAL_FLUSH also
synchronizes all vertex stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18 10:09:05 +02:00
Samuel Pitoiset
88e56804a7 radv: reduce number of CB/DB meta flushes for VK_ACCESS_TRANSFER_WRITE_BIT
If we know that the given image doesn't have any metadata,
we don't need to flush.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-07-17 09:34:20 +02:00
Samuel Pitoiset
f1b3f7bfac radv: simplify the logic in radv_set_descriptor_set()
Now that 'set' can't be NULL because the meta operations no
longer bind a NULL descriptor, the logic can be simplified
a little bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-12 11:08:49 +02:00
Samuel Pitoiset
826b3a8773 radv: remove one useless check in radv_bind_descriptor_set()
'set' shouldn't be NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-12 11:08:47 +02:00
Samuel Pitoiset
5b32926f7e radv: remove unnecessary verification code around ring_offsets_idx
I don't want to waste CPU cycles for nothing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-12 11:08:42 +02:00
Samuel Pitoiset
6248fbe5e4 radv: get rid of buffer object priorities
We mostly use the same priority for all buffer objects, so
I don't think that matter much. This should reduce CPU
overhead a little bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-12 11:08:40 +02:00
Samuel Pitoiset
1f616a840e radv: emit a dummy ZPASS_DONE to prevent GPU hangs on GFX9
A ZPASS_DONE or PIXEL_STAT_DUMP_EVENT (of the DB occlusion
counters) must immediately precede every timestamp event to
prevent a GPU hang on GFX9.

Cc: 18.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-12 10:22:36 +02:00
Samuel Pitoiset
3a16c722cf radv: add support for VK_KHR_create_renderpass2
VkCreateRenderPass2KHR() is quite similar to VkCreateRenderPass()
but refactoring the code is a bit painful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-12 10:20:10 +02:00
Samuel Pitoiset
fe28978f2a radv: introduce radv_subpass_attachment data structure
Needed for VK_KHR_create_renderpass2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-12 10:20:06 +02:00
Samuel Pitoiset
4a67ce886a radv: make sure to wait for CP DMA when needed
This might fix some synchronization issues. I don't know if
that will affect performance but it's required for correctness.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-11 12:11:56 +02:00
Samuel Pitoiset
e8f82b33fb radv: add the trace BO to the list when starting a new cmdbuf
That might reduce CPU overhead a little bit when using
RADV_TRACE_FILE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-09 13:57:01 +02:00
Samuel Pitoiset
5e5a28d52a radv: reduce CPU overhead in radv_flush_descriptors()
The number of enabled descriptors for a given pipeline stage
can be computed at compile time.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-09 13:56:58 +02:00
Samuel Pitoiset
85865dbe0d radv: fix emitting the view index on GFX9
For merged shaders, VS as HS for example.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-06 10:22:53 +02:00
Samuel Pitoiset
f2a310849e radv: only flush CB meta in pipeline image barriers when needed
If the given image doesn't enable CMASK, FMASK or DCC that's
useless to flush CB metadata.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-05 17:20:16 +02:00
Samuel Pitoiset
17bb4c2cf5 radv: only flush DB meta in pipeline image barriers when needed
If the given image doesn't have HTILE, that's useless to flush
DB metadata.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-05 17:20:12 +02:00
Samuel Pitoiset
2a3e9c89ff radv: fix "error: initializer element is not constant" build error
GCC 4.8 fails to compile with "static const", while GCC 8.1
fails to compile with only "static".

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-07-05 17:12:02 +02:00
Samuel Pitoiset
8339ba827b radv: optimize vkCmd{Set,Reset}Event() a little bit
Always emitting a bottom-of-pipe event is quite dumb. Instead,
start to optimize these functions by syncing PFP for the
top-of-pipe and syncing ME for the post-index-fetch event.

This can still be improved by emitting EOS events for
syncing PS and CS stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-05 11:31:06 +02:00
Samuel Pitoiset
f635109140 radv: optimize radv_CmdWaitEvents()
This introduces radv_barrier() (same as the draw/dispatch codepath).
This helper is used for merging the code from CmdWaitEvents() and
CmdPipelineBarrier because it's quite similar.

We do ignore the source stage mask for CmdWaitEvents because
it's irrelevant when event objects are used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-05 11:31:03 +02:00
Samuel Pitoiset
7a57c82767 radv: use separate bind points for the dynamic buffers
The Vulkan spec says:

   "pipelineBindPoint is a VkPipelineBindPoint indicating whether
    the descriptors will be used by graphics pipelines or compute
    pipelines. There is a separate set of bind points for each of
    graphics and compute, so binding one does not disturb the other."

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-27 09:48:31 +02:00
Samuel Pitoiset
9c09e7d66e radv: remove unused 'predicated' parameter from some functions
It's always false.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-06-27 09:48:15 +02:00
Samuel Pitoiset
ba5e25ed29 radv: ignore pInheritanceInfo for primary command buffers
From the Vulkan spec:
"If this is a primary command buffer, then this value is ignored."

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-26 10:39:43 +02:00
Samuel Pitoiset
07cb1373a2 radv: fix HTILE metadata initialization in presence of subpass clears
If the driver ends up by performing a slow depthstencil clear,
the HTILE metadata won't be initialized correctly.

This fixes random VM faults on Polaris while running CTS
with Bas's runner. This doesn't seem to regress performance.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-25 17:38:59 +02:00
Samuel Pitoiset
41f6096c26 radv: use EOP_DATA_SEL_* instead of magic numbers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-21 10:31:02 +02:00
Samuel Pitoiset
65b3fed037 radv: always initialize the clear depth/stencil values to 0
Similar to the clear color values.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-20 13:21:42 +02:00
Samuel Pitoiset
204cf5714a radv: always initialize the clear color values to 0
Having random data in there is probably not the best.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-20 13:21:42 +02:00
Samuel Pitoiset
4b564bd612 radv: always initialize the DCC predicate to FALSE
This might eventually skip some useless DCC decompression
passes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-20 13:21:42 +02:00
Bas Nieuwenhuizen
ed06b1cdca radv: Don't check for pipeline being set in draw.
Draws without pipeline are definitely not allowed.

Fixes Coverity issue 1434216.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-06-19 22:35:13 +02:00
Marek Olšák
6703fec58c amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbuf
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-19 13:08:50 -04:00
Bas Nieuwenhuizen
a3d93eec7c radv: Use less conservative approximation for context rolls.
Drops the number of time we set the scissor by 4x for F1 2017,
which results in a consistent performance improvement of about 4%.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-06-18 16:21:10 +02:00
Samuel Pitoiset
f8e2c4c57c Revert "radv: always set/load both depth and stencil clear values"
This fixes a rendering regression with RoTR.

This reverts commit 4bdad9fadd.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-15 16:52:06 +02:00
Samuel Pitoiset
706d51de7f radv: update ZRANGE_PRECISION in radv_update_bound_fast_clear_ds()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-15 15:54:06 +02:00
Samuel Pitoiset
fa8bc821a8 radv: clean up radv_{set,load}_depth_clear_regs() helpers
And replace _regs by _metadata because it makes more sense.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-15 15:54:04 +02:00
Samuel Pitoiset
4bdad9fadd radv: always set/load both depth and stencil clear values
I don't think that matter much to emit both values and that
makes the code a bit simpler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-15 15:54:02 +02:00
Samuel Pitoiset
2193a6a828 radv: update the fast ds clear values only if the image is bound
It's unnecessary to update the fast depth/stencil clear values
if the fast cleared depth/stencil image isn't currently bound.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-15 15:54:00 +02:00
Samuel Pitoiset
be794fa26b radv: clean up radv_{set,load}_color_clear_regs() helpers
And replace _regs by _metadata because it makes more sense.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-15 15:53:58 +02:00
Samuel Pitoiset
d7b772abb4 radv: update the fast color clear values only if the image is bound
It's unnecessary to update the fast color clear values if the
fast cleared color image isn't currently bound.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-15 15:53:55 +02:00
Samuel Pitoiset
68dead112e radv: update the ZRANGE_PRECISION value for the TC-compat bug
On GFX8+, there is a bug that affects TC-compatible depth surfaces
when the ZRange is not reset after LateZ kills pixels.

The workaround is to always set DB_Z_INFO.ZRANGE_PRECISION to match
the last fast clear value. Because the value is set to 1 by default,
we only need to update it when clearing Z to 0.0.

We also need to set the depth clear regs and to update
ZRANGE_PRECISION when initializing a TC-compat depth image to 0.

Original patch from James Legg.

This fixes random CTS fails with
dEQP-VK.renderpass.suballocation.formats.d32_sfloat_s8_uint.input.*

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105396
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-14 11:38:29 +02:00
Alex Smith
dfff9fb6f8 radv: Handle GFX9 merged shaders in radv_flush_constants()
This was not previously handled correctly. For example,
push_constant_stages might only contain MESA_SHADER_VERTEX because
only that stage was changed by CmdPushConstants or
CmdBindDescriptorSets.

In that case, if vertex has been merged with tess control, then the
push constant address wouldn't be updated since
pipeline->shaders[MESA_SHADER_VERTEX] would be NULL.

Use radv_get_shader() instead of getting the shader directly so that
we get the right shader if merged. Also, skip emitting the address
redundantly - if two merged stages are set in push_constant_stages
this change would have made the address get emitted twice.

Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Cc: "18.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-06-01 08:53:34 +01:00