The sparse image VA needs to be returned to the application for replay.
Reported by Baldur.
VKCTS has coverage but it doesn't verify this yet.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35162>
Turns out, some Midgard GPUs don't support more than 4x MSAA. Add a
quirk for those GPUs, so don't expose it when it doesn't work.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35184>
We can't easily pass multiple initializers here, because a comma in the
initializer list would be treated as a preprocessor argument separator
and not a separator in the initializer lst.
We could also have fixed this with some nested macro ugliness, but let's
instead do what nir_builder does for intrinsic indices and use __VA_ARGS__
to keep this neat.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35184>
When using 16x MSAA, we have two sample-positions on the negative
boundary of the unit-square covering the pixel. This causes problems
when using the default tie-breaking rule, where we miss some
sample-positions when rasterizing primitives covering the entire
viewport.
This works fine on Bifrost and later, but this setting is ignored on
those GPUs, and they assume the default (e.g MINUS_180_OUT_0_IN).
Because we'd prefer for rasterization to match between Midgard and
Bifrost when we can, we only apply this when we have 16x MSAA.
As an added bonus, this behavior matches what the DDK does.
Fixes these tests when 16x MSAA is enabled:
- dEQP-GLES31.functional.texture.multisample.samples_16.use_texture_*
- dEQP-GLES3.functional.multisample.fbo_max_samples.proportionality_alpha_to_coverage
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35184>
This should be helful when we want to enable higher sample counts.
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35184>
The formatting here has grown some warts over time, let's clean it up a
bit.
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35184>
The V4 GPUs doesn't have the dynamic allocation logic that V5 and later
has. There's nothing to calculate here; the GPU either supports 8x MSAA,
or 4x MSAA.
Since 8x MSAA is the architectural max, let's have this function report
that. We deal with the 4x limit separately as a quirk, because this
applies to some V5 GPUs as well.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35184>
This value isn't valid on V4, so let's make sure we don't try to use it.
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35184>
This function was removed about a decade ago, let's get rid of the
prototype as well!
Fixes: a347a0f53f ("mesa: Completely remove QuerySamplesForFormat from driver func table")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35184>
register shadow enabling for user queue is different code flow than
kernel queue. In case of kernel queue preamble ib is initialized which
is not requried for kernel queue.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34803>
for pipelines, we know enabled features. for classic shader objects, we do not.
therefore, we want to plumb this through explicitly for drivers using common
pipelines, rather than making drivers guess whether they can use the device
features.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35169>
This was mostly wired up, but we currently require an alignment of 64
for uniform texel buffers, because we're currently using
plane-descriptors for this.
We could lift that limitation by switching to buffer descriptors and use
LD_CVT for the format-conversion, but that's a bigger change.
Let's just fix up the aligntment and enable the extension for now.
Reviewed-by: Olivia Lee <benjamin.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34826>
Vulkan is supposed to operate in explicit synchronization mode. However,
for legacy compositors that only support implicit fencing, we have to
extract the compositor implicit fence (release fence) and resolve it
properly. Since we used to rely on renderer side drivers being able to
handle implicit in-fence, here we only opt-in the new behavior for those
known to have issues with that.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34516>
We weren't setting the accum src (which should be pT for now) and we put
ftz in the wrong place. Bit 5 is actually .bf which we want to set all
the time in order to get a float output. (Otherwise it gives an integer
output.)
Fixes: a3330f1d46 ("nak/sm20: Add float ops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35170>
Use the new shared presentation feedback code in the loader to implement
perfetto frame delivery tracing similar to the wayland vulkan wsi code.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32757>
This is a potentially slow process, so let's break it out into its own
function so we can have more meaningful profiling data from perfetto later.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32757>
The throttling code is potentially long running. Move it to a separate
function so we can have better perfetto tracing later.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32757>
We only use the acquisition time for calculating latency for perfetto
tracks later, and the acquisition time should ideally be the start of the
perfetto flow.
This has been more or less true with very small error margin for vk wsi,
but the wayland EGL buffer handling is a lot more complicated. Moving the
time check into the flow start will make re-using this code for EGL much
simpler.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32757>
