Commit graph

66061 commits

Author SHA1 Message Date
Mike Blumenkrantz
ec7afd2c24 dril: rework config creation
the original implementation of config selection had a number of flaws:
* using eglChooseConfigs with lots of loops, which was okay for filtering but
  also added considerable complexity and made it difficult to correctly
  get all the configs
* not adding enough configs; there were a lot more color and zs formats
  which weren't in the base config list
* double buffer configs were never created
* srgb configs were also never created

there will now be fewer configs than there were pre-DRIL, but this is only
because accum buffers are now gone and not because anything of value is
missing

Fixes: 3de62b2f9a ("gallium/dril: Compatibility stub for the legacy DRI loader interface")

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30311>
2024-07-24 23:42:05 +00:00
Martin Krastev
bcff324ef3 svga/ci: disable vmware-qemu-traces jobs
The vmware farm job vmware-qemu-traces is currently not runnable after
network restructuring (new firewall rules). Disable job for now.

Signed-off-by: Martin Krastev <martin.krastev@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30344>
2024-07-24 21:26:26 +00:00
Martin Krastev
61a647ba4a svga/ci: triage unexpected piglit passes
Triage piglit unexpected passes
	spec@!opengl 1.1@clipflat
	spec@!opengl 1.0@gl-1.0-polygon-line-aa
	spec@arb_buffer_storage@bufferstorage-persistent
	spec@arb_copy_buffer
	spec@arb_sync@clientwaitsync-timeout
	spec@ext_direct_state_access@named-buffers

Signed-off-by: Martin Krastev <martin.krastev@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30344>
2024-07-24 21:26:26 +00:00
Martin Krastev
93005d20ee svga/ci: update FORCE_KERNEL_TAG
Signed-off-by: Martin Krastev <martin.krastev@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30344>
2024-07-24 21:26:26 +00:00
Martin Krastev
d0df53558e svga/ci: triage unexpected piglit pass
Triage unexpected pass
	shaders@glsl-bug-110796

Signed-off-by: Martin Krastev <martin.krastev@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30344>
2024-07-24 21:26:26 +00:00
David Rosca
8b1a889e45 radeonsi/vcn: Add support for QVBR rate control mode
This rate control mode needs pre-encode enabled and currently is
supported for VCN3 and VCN4.
AV1 needs quality level scaled down from 255 to 51 range.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4024
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30221>
2024-07-24 20:18:49 +00:00
David Rosca
ae293d176b radeonsi/vcn: Bump enc FW interface version for VCN3 and VCN4
This is needed to enable QVBR support. Also adjust to changes in
spec_misc_av1.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30221>
2024-07-24 20:18:49 +00:00
David Rosca
e539f8ef5f radeonsi/vcn: Only enable filler data for CBR
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30221>
2024-07-24 20:18:49 +00:00
Eric Engestrom
f1f8c465d5 vc4,v3d,v3dv: avoid compiling in unused sim_file field in the {vc4,v3d}_screen/v3dv_physical_device struct
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30287>
2024-07-24 19:11:24 +00:00
Eric Engestrom
eae740f2e4 v3d,v3dv: simplify USE_V3D_SIMULATOR/using_v3d_simulator logic
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30287>
2024-07-24 19:11:24 +00:00
Eric Engestrom
5577078ac1 v3d,v3dv: figure out whether we're using the simulator only once
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30287>
2024-07-24 19:11:23 +00:00
Eric Engestrom
f90d1182e0 v3d,v3dv: reuse dep_v3d_hw from simulator/meson.build
broadcom/simulator/ gets parsed before broadcom/vulkan/ or
gallium/drivers/v3d/ so this is safe.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30287>
2024-07-24 19:11:23 +00:00
Dylan Baker
4ef0cbaf05 crocus: check for depth+stencil before creating resource
This avoid leaking memory if we return early.

Fixes: 5f7df5df0d ("crocus: disable depth and d+s formats with memory objects")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30305>
2024-07-24 17:21:26 +00:00
Dylan Baker
34145725ce crocus: properly free resources on BO allocation failure
Iris already has the same fix applied.

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30305>
2024-07-24 17:21:26 +00:00
Dylan Baker
11bc95934f tgsi_to_nir: free disk cache value if the size is wrong
Fixes: 4db880d805 ("ttn: Implement disk cache")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30308>
2024-07-24 16:50:59 +00:00
Christian Gmeiner
a885f91617 etnaviv: Rework uniform handling for UBO addresses
We are not using this 'feature'. Doing this in the
compiler would be lot of pain, as there is no backend
IR. The right way to do it would be nir address opt pass,
that does some offset and shift lowering. Lets see this
commit as prep change for a nir pass and/or backend IR.

Use the content to store the index of the UBO.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30331>
2024-07-24 12:52:22 +00:00
Mike Blumenkrantz
9b7bb6cc9f gallium: install gallium-$version.so to libdir
Installing this private library into the default library
search path avoids needing to rely on -Wl,-rpath,
which is inconsistently implemented as either DT_RUNPATH
or DT_RPATH on different distributions; in particular,
on distributions that implement it as DT_RPATH,
it interferes with use of LD_LIBRARY_PATH and has semantics
that are difficult to reason about, and is incompatible with
Steam's container runtime (which has the known limitation that
it only implements DT_RUNPATH and not DT_RPATH).

To avoid third-party developers being tempted to link to the
unstable libgallium, give it a name that varies with each Mesa release,
so that there is no obvious way for third-party software to link to it.
This is similar to the way the proprietary Nvidia driver sets up its similar
implementation-detail libraries such as libnvidia-glcore.so.535.183.01.

Fixes: 50fc7cc2 ("glx: directly link to gallium")

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30328>
2024-07-24 12:15:55 +00:00
Karol Herbst
098e660a58 rusticl/memory: add a couple of performance warnings
It's mostly just GPU stalls for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30324>
2024-07-24 11:07:52 +00:00
Karol Herbst
ea0676d8ec rusticl/memory: remove stale TODOs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30324>
2024-07-24 11:07:52 +00:00
Karol Herbst
aae84eccfa rusticl/platform: add perf debug option
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30324>
2024-07-24 11:07:52 +00:00
Icenowy Zheng
e16a74c023 llvmpipe: add LoongArch support in ORCJIT
LoongArch is an architecture too new to have MCJIT support.

Add its support to ORCJIT code.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30197>
2024-07-24 00:59:23 +00:00
Icenowy Zheng
979c364018 gallivm: add LoongArch support to the mattrs setting code
Currently the mattrs is set according to the softdev convention, with
LSX explicitly disabled because it's troublesome at least on LLVM 17.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30197>
2024-07-24 00:59:23 +00:00
Christian Gmeiner
305bf503e7 dri: fix driver names
All the driver reports itself with a hyphen here, so they all stopped
loading completely after 50fc7cc290. Check each of them with the latest
kernel sources.

Fixes: 50fc7cc290 ("glx: directly link to gallium")

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30330>
2024-07-23 22:32:07 +02:00
Erico Nunes
0bdc2f180f dri: fix sun4i-drm driver name
The driver reports itself as sun4i-drm with a hyphen here, so
it stopped loading completely after 50fc7cc290.

Fixes: 50fc7cc290 ("glx: directly link to gallium")
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30326>
2024-07-23 19:27:25 +00:00
Ruijing Dong
8a5ef9413b radeonsi/vcn: add HDR metadata obu in av1enc
Enable HDR metadata obu in av1 encoder for
both vcn4/5.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
2024-07-23 17:16:21 +00:00
Ruijing Dong
fc4abbe27d frontends/va: rework VAConfigAttribEncPackedHeaders query
to make it easy to add new values.
enable av1 meta data as the input packed header

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
2024-07-23 17:16:21 +00:00
Ruijing Dong
aa86c3a235 radeonsi/vcn: input av1 hdr metadata
get av1 hdr metadata from frontends.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
2024-07-23 17:16:21 +00:00
Ruijing Dong
8ea977ca5e frontends/va: check av1 enc hdr metadata
Decode packed header HDR metadata
for av1 encoding.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
2024-07-23 17:16:21 +00:00
Ruijing Dong
35e4d0db9c radeonsi/vcn: add new function for obu_header
add a function for av1_obu_header.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
2024-07-23 17:16:21 +00:00
Ruijing Dong
94d881e621 radeonsi/vcn: correct a typo in a variable
from spliting to splitting

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
2024-07-23 17:16:21 +00:00
Marek Olšák
07ef1a8124 ac,radeonsi: set 16-bit flags in io_options optimally
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
2024-07-23 16:13:17 +00:00
Marek Olšák
709ebd8293 amd: expose nir_io_mix_convergent_flat_with_interpolated
The drivers need to invert how they gather flat inputs.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
2024-07-23 16:13:17 +00:00
Marek Olšák
b2d32ae246 nir: add nir_intrinsic_load_per_primitive_input, split from io_semantics flag
Instead of having 1 bit in nir_io_semantics indicating a per-primitive
FS input, add a dedicated intrinsic for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
2024-07-23 16:13:16 +00:00
Ganesh Belgur Ramachandra
0cb3ace969 radeonsi: fix eptich on chips without image opcodes (e.g. gfx940)
This fixes VAAPI decode corruption issues.

Fixes: 26cd3a1718 ("ac,radv,radeonsi: add a helper to set mutable tex desc fields")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30273>
2024-07-23 14:50:37 +00:00
Neha Bhende
8f9a157daa dri: fix macro name check to detect svga driver
svga driver is detected via HAVE_SVGA.

Since commit 50fc7cc290, svga driver was not loading at all

Fixes: 50fc7cc290 ("glx: directly link to gallium")

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Zack Rusin <zack.rusin@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30307>
2024-07-23 04:50:31 +00:00
Faith Ekstrand
74b4c91e7b meson/megadriver: Don't invoke the megadriver script with no drivers
Otherwise, the install will fail due to missing arguments to
install_megadrivers.py.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30277>
2024-07-23 03:26:00 +00:00
Francisco Jerez
49b433d5e7 iris: Pin pixel hashing table BO from iris_batch submission instead of from iris_state.
This fixes sporadic rendering corruption reported on MTL with ChromeOS
in cases where multiple processes including Chrome were utilizing the
GPU concurrently, and one of the processes happened to submit a
BLORP-only batch buffer right after a switch from a different context.

In such a scenario we would fail to add the BO that holds the pixel
hashing tables to the execbuf IOCTL for the BLORP batch, because it
was being pinned from iris_restore_render_saved_bos() which isn't
called for BLORP operations, potentially causing it to use garbage as
pixel pipe hashing tables, which led to corruption of the BLORP
rendering.

Technically this could have affected DG2 as well, but it has only been
reported on MTL so far.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30274>
2024-07-23 00:40:24 +00:00
Maaz Mombasawala
1a8b232115 svga: Validate surface during copy check
Fixes piglit test arb_copy_buffer-data-sync.
The test fails inconsistently because svga_buffer_surface handle is sometimes
not present at time of copy check, so the copy does not happen.
Adding a validata_host_surface() call for the surface being copied ensures the
handle is present.

Signed-off-by: Maaz Mombasawala <maaz.mombasawala@broadcom.com>
Reviewed-by: Neha Bhende <neha.bhende@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29949>
2024-07-22 22:33:47 +00:00
Karol Herbst
bad67ee77c spirv: handle function parameters passed by value
Cc: mesa-stable
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29896>
2024-07-22 21:16:58 +00:00
Pierre-Eric Pelloux-Prayer
a55b9c0c60 radeonsi: consider DBG(NO_TILING) when filtering modifiers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30257>
2024-07-22 10:09:34 +00:00
Pierre-Eric Pelloux-Prayer
94f2b3f7bc radeonsi: consider PIPE_BIND_LINEAR when filtering modifiers
If PIPE_BIND_LINEAR is set the only valid modifier we can use is
DRM_FORMAT_MOD_LINEAR.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30257>
2024-07-22 10:09:34 +00:00
Pierre-Eric Pelloux-Prayer
f12ccea6c7 radeonsi: reject modifiers with DCC when NO_EXPORTED_DCC is used
Otherwise AMD_DEBUG=noexporteddcc will be ignored when modifier are
used.
Similarly to AMD_DEBUG=nodcc handling, this makes the application
unable to import buffers with DCC as well - the alternative would be
to implement the filtering only in the texture creation path, so in
the si_modifier_supports_resource function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30257>
2024-07-22 10:09:34 +00:00
Juan A. Suarez Romero
4215d50384 v3d: add new clear blitter op
A specific clear_surface blitter operation is required, because in this
case we need to save framebuffer information, but not in standard clear,
as we are currently doing.

This fixes a leak in depthstencil surface, which happens because we were
storing saving it as part for the framebuffer information, but the
blitter clear wasn't restoring it because it wasn't required (only it
is required in clearing a surface).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30240>
2024-07-22 08:11:57 +00:00
Juan A. Suarez Romero
7158950a6f v3d: use operations to specify what to save in blitter
So far, in order to know what we need to save before using the blitter
utility, we use a boolean to know if we are going to do a blit or not,
and if we need to take in account conditional rendering or not.

In other to allow to specify more operations than blit or not, use an
enum to define what operation we would like to do, and based on that
what information we need to store.

This also merge the conditional rendering as part of these operations.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30240>
2024-07-22 08:11:57 +00:00
Icenowy Zheng
5f22e152ad gallivm: orcjit: use atexit to release LPJit singleton at exit
Valgrind will report some memory possibly lost because of this singleton
(it's dynamically allocated when it is first accessed).

Use atexit() to register a handler that releases this singleton.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30216>
2024-07-21 23:17:17 +00:00
Icenowy Zheng
3423e73cec gallivm: orcjit: keep the ownership of tm for LPJit
The ownership of the TargetMachine object is released when LPJit
singleton is constructed, leads to a slight memory loss detectable.

Keep the ownership by saving the unique pointer as another class member
named tm_unique.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30216>
2024-07-21 23:17:17 +00:00
Aleksi Sapon
fd0592afd3 gallivm: Fix LLVMPipe codegen issues discovered on Apple Silicon
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30108>
2024-07-20 15:36:24 +00:00
Icenowy Zheng
ca087e2027 zink: reject Imagination proprietary driver w/o geometryShader
On some low-end GPUs (e.g. BXE/BXM series), the Imagination proprietary
Vulkan driver do not implement geometryShader feature, which is required
by Zink currently to smoothen lines. In addition, these vulkan drivers
shipped are usually not robust enough to run Zink at all, and
frequently fail with crashes.

Reject these drivers.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30280>
2024-07-20 22:03:54 +08:00
Francisco Jerez
49144ebcf9 iris/gfx12.5: Pass non-empty push constant data to PS stage for TBIMR workaround.
Note that this bug leading to GPU hangs hasn't been reproduced on GL
so far, workaround is mainly included for completeness.

Fixes: 57decad976 ("intel/xehp: Enable TBIMR by default.")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30031>
2024-07-20 01:13:19 +00:00
Mike Blumenkrantz
53f249b921 zink: use blake3 instead of sha1 for program cache
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30261>
2024-07-19 23:17:50 +00:00