Commit graph

25283 commits

Author SHA1 Message Date
Jose Fonseca
ea3f394e4a scons: Use LD version script for libgl-xlib.
Trivial.
2015-11-27 14:14:25 +00:00
Jose Fonseca
a11955b9f9 svga: Don't return value from void function.
Addresses MSVC warning C4098: 'svga_destroy_query' : 'void' function
returning a value.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-11-27 14:14:25 +00:00
Jose Fonseca
c127e6a3ea gallium: Make pipe_query_result::batch array length non-zero.
Zero length arrays are non standard:

   warning C4200: nonstandard extension used : zero-sized array in struct/union
   Cannot generate copy-ctor or copy-assignment operator when UDT contains a zero-sized array

And all code does `N * sizeof query_result->batch[0]`, so it should work
exactly the same.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-11-27 14:14:25 +00:00
Rob Clark
57fc0dd8d5 freedreno/ir3: assign varying locations later
Rather than assigning inloc up front, when we don't yet know if it will
be unused, assign it last thing before the legalize pass.

Also, realize when inputs are unused (since for frag shader's we can't
rely on them being removed from ir->inputs[]).  This doesn't make sense
if we don't also dynamically assign the inloc's, since we could end up
telling the hw the wrong # of varyings (since we currently assume that
the # of varyings and max-inloc are related..)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-11-26 12:35:10 -05:00
Rob Clark
2181f2cd58 freedreno/ir3: use instr flag to mark unused instructions
Rather than magic depth value, which won't be available in later stages.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-11-26 12:35:10 -05:00
Rob Clark
2fbe4e7d2f freedreno/a4xx: rework vinterp/vpsrepl
Same as previous commit, for a4xx.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-11-26 12:35:10 -05:00
Rob Clark
5adf4a5cda freedreno/a3xx: rework vinterp/vpsrepl
Make the interpolation / point-sprite replacement mode setup deal with
varying packing.

In a later commit, we switch to packing just the varying components that
are actually used by the frag shader, so we won't be able to assume
everything is vec4's aligned to vec4.  Which would highly confuse the
previous vinterp/vpsrepl logic.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-11-26 12:35:10 -05:00
Serge Martin
b7c958b7b7 clover: fix tgsi compiler crash with invalid src
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-11-26 15:30:25 +02:00
Nicolai Hähnle
6b5268d202 radeon: use PIPE_DRIVER_QUERY_FLAG_DONT_LIST for perfcounters
Since the query names are not very enlightening, and there are thousands
of them, GALLIUM_HUD=help should only show the first and last query name
for each hardware block.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-26 10:57:44 +01:00
Nicolai Hähnle
f36d9857cd gallium: add PIPE_DRIVER_QUERY_FLAG_DONT_LIST
This allows the driver to give a hint to the HUD so that GALLIUM_HUD=help is
less spammy.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-26 10:57:43 +01:00
Nicolai Hähnle
80a16dece6 radeon: delay the generation of driver query names until first use
This shaves a bit more time off the startup of programs that don't
actually use performance counters.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-26 10:57:43 +01:00
Julien Isorce
ca976e6900 st/va: add missing profiles in PipeToProfile's switch.
Otherwise assert is raised from vlVaQueryConfigProfiles's for loop.

Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-26 08:21:45 +00:00
Michel Dänzer
22d2dda03b targets/xvmc: use the non-inline sw helpers
This was missed in commit 59cfb21d ("targets: use the non-inline sw
helpers").

Fixes build failure:

  CXXLD    libXvMCgallium.la
../../../../src/gallium/auxiliary/pipe-loader/.libs/libpipe_loader_static.a(libpipe_loader_static_la-pipe_loader_sw.o):(.data.rel.ro+0x0): undefined reference to `sw_screen_create'
collect2: error: ld returned 1 exit status
Makefile:756: recipe for target 'libXvMCgallium.la' failed
make[3]: *** [libXvMCgallium.la] Error 1

Trivial.
2015-11-26 12:14:28 +09:00
Emil Velikov
72c33f0dd5 targets/nine: remove freedreno target
Analogous to previous commit. As we no longer have anyone who uses NIR
we can drop the link.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
2015-11-25 20:29:44 +00:00
Emil Velikov
aa335bb01b targets/nine: remove vc4 target
There are no users for it.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-11-25 20:28:38 +00:00
Emil Velikov
b78259c4b5 gallium: remove unused function declarations
Unused as of commit 23fb11455b "{st,targets}/dri: use static/dynamic
pipe-loader"

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-25 20:26:52 +00:00
Emil Velikov
59cfb21d46 targets: use the non-inline sw helpers
Previously (with the inline ones) things were embedded into the
pipe-loader, which means that we cannot control/select what we want in
each target.

That also meant that at runtime we ended up with the empty
sw_screen_create() as the GALLIUM_SOFTPIPE/LLVMPIPE were not set.

v2: Cover all the targets, not just dri.

Cc: "11.1" <mesa-stable@lists.freedesktop.org>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Oded Gabbay <oded.gabbay@gmail.com>
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
2015-11-25 20:25:29 +00:00
Emil Velikov
fbc6447c3d target-hepers: add non inline sw helpers
Feeling rather dirty copying the inline ones, yet we need the inline
ones for swrast only targets like libgl-xlib, osmesa.

Cc: "11.1" <mesa-stable@lists.freedesktop.org>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Oded Gabbay <oded.gabbay@gmail.com>
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
2015-11-25 20:25:14 +00:00
Emil Velikov
f623517188 pipe-loader: fix off-by one error
With earlier commit we've dropped the manual iteration over the fixed
size array and prepemtively set the variable storing the size, that is
to be returned. Yet we forgot to adjust the comparison, as before we
were comparing the index, now we're comparing the size.

Fixes: ff9cd8a67c "pipe-loader: directly use
pipe_loader_sw_probe_null() at probe time"
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93091
Reported-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2015-11-25 20:22:35 +00:00
Tom Stellard
89851a2965 radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register values
The compiler has more information and is able to optimize the bits
it sets in these registers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

CC: <mesa-stable@lists.freedesktop.org>
2015-11-25 11:03:05 -05:00
Tom Stellard
95e0510916 radeonsi: Rename si_shader::ls_rsrc{1,2} to si_shader::rsrc{1,2}
In the future, these will be used by other shaders types.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-25 11:03:05 -05:00
Nicolai Hähnle
ad22006892 radeonsi: implement AMD_performance_monitor for CIK+
Expose most of the performance counter groups that are exposed by Catalyst.
Ideally, the driver will work with GPUPerfStudio at some point, but we are not
quite there yet. In any case, this is the reason for grouping multiple
instances of hardware blocks in the way it is implemented.

The counters can also be shown using the Gallium HUD. If one is interested to
see how work is distributed across multiple shader engines, one can set the
environment variable RADEON_PC_SEPARATE_SE=1 to obtain finer-grained performance
counter groups.

Part of the implementation is in radeon because an implementation for
older hardware would largely follow along the same lines, but exposing
a different set of blocks which are programmed slightly differently.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-25 15:52:09 +01:00
Nicolai Hähnle
b9fc01aee7 radeon: scale query buffer size to result size
Performance monitor queries can become very big, especially considering that
instances of a block in different shader engines are queried separately.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-25 15:28:09 +01:00
Nicolai Hähnle
592928065c radeonsi/sid: add performance counter registers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-25 15:28:06 +01:00
Nicolai Hähnle
9823048e0b radeonsi/sid: add hardware constants for COPY_DATA packet
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-25 15:28:03 +01:00
Nicolai Hähnle
1aa3b48c12 radeon: extend CIK_UCONFIG_REG_END for performance counters
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-25 15:28:00 +01:00
Nicolai Hähnle
b589e18a98 radeon: add perfcounter-related EVENT_TYPEs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-25 15:27:56 +01:00
Nicolai Hähnle
30462b1826 radeon: additional constants for WAIT_REG_MEM and EVENT_WRITE_EOP
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-25 15:27:34 +01:00
Julien Isorce
63c344d179 nouveau: move interlaced assert down in nouveau_vp3_video_buffer_create
templat->interlaced is 0 if not NV12 which is the case currently
when using VPP.

Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-25 08:17:39 +00:00
Roland Scheidegger
6c6a439e98 softpipe/llvmpipe: don't advertize support for ASTC
3333977556 added support for ASTC textures to
gallium. They don't have any helpers hooked up for software decoding, however,
so cannot support them in drivers relying on util code for decoding.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-24 18:26:11 +01:00
Roland Scheidegger
97eed8dcb9 llvmpipe: don't test for unsupported formats in lp_test_format
Removing the fake format helpers (1c7d0a6aa4)
caused this to fail. These formats were never supported, but previously
they would have asserted in the generated jit functions (which, due to lack
of test cases for these formats, were never called) whereas we now assert when
trying to build the jit function. So, skip them completely.

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=93092

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-24 18:26:11 +01:00
Christian König
d3e2c48dfa st/va: fix indentation
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-11-24 15:31:48 +01:00
Christian König
64761a841d st/va: move MPEG4 functions into separate file
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-11-24 15:31:45 +01:00
Christian König
9fe7924328 st/va: move VC-1 functions into separate file
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-11-24 15:31:41 +01:00
Christian König
da173344a6 st/va: move H264 functions into separate file
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-11-24 15:31:38 +01:00
Christian König
c9cb22392b st/va: move MPEG12 functions into separate file
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-11-24 15:31:35 +01:00
Christian König
ec6ef1cbfe st/va: move post processing function into own file
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-11-24 15:31:31 +01:00
Christian König
3d6386fdc5 st/va: fix post process dirty area handling
The dirty area in this call isn't related to the screen at all.

v2: set clear dirty area to false as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-11-24 15:31:11 +01:00
Michel Dänzer
d094631936 radeon/llvm: Use llvm.AMDIL.exp intrinsic again for now
llvm.exp2.f32 doesn't work in some cases yet.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92709

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2015-11-24 18:07:48 +09:00
Boyuan Zhang
f55f134a03 radeon/uvd: uv pitch separation for stoney
v2: set the behaviour default for future ASICs.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2015-11-23 17:34:43 -05:00
Jose Fonseca
c9651f0264 svga: Add ASTC formats to format table.
Fixes build.  Otherwise untested.

Trivial.
2015-11-23 16:45:28 +00:00
Ilia Mirkin
754b26e76d freedreno/ir3: add support for a few gs5 ops
Tested on a4xx. This is part of the builtins added by ARB_gpu_shader5
and GLSL ES 3.10.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-23 11:17:16 -05:00
Ilia Mirkin
cca8dd4e93 ttn: fix UMSB conversion
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-23 11:17:16 -05:00
Ilia Mirkin
190acb34ca freedreno/a4xx: add ARB_texture_query_lod support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-23 11:17:15 -05:00
Ilia Mirkin
f0e670bdd7 ttn: add LODQ support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-23 11:17:15 -05:00
Ilia Mirkin
9761d5146f freedreno/a4xx: re-emit program on dirty framebuffer
The program emit depends on certain fb details. Make sure those get
updated when the fb changes.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-23 11:17:15 -05:00
Ilia Mirkin
81b16350fa freedreno/a4xx: use a factor of 32767 for snorm8 blending
It appears that the hardware wants the integer to be scaled the same way
that the hardware representation is. snorm16 uses one of the float
factors, so this is only relevant for snorm8.

This fixes a number of subcases of
  bin/fbo-blending-formats GL_EXT_texture_snorm

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-11-23 11:17:15 -05:00
Ilia Mirkin
6f17f19b17 freedreno/a4xx: only compute texture offset once for the view
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-23 11:17:15 -05:00
Ilia Mirkin
f10bb0ac9e freedreno/a4xx: add ARB_texture_view support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-23 11:17:15 -05:00
Ilia Mirkin
1b9992b803 freedreno/a4xx: add formats for ARB_texture_buffer_object_rgb32 support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-23 11:17:15 -05:00