Commit graph

33105 commits

Author SHA1 Message Date
Dave Airlie
dd3630f71c r600/cs: add support for compute to image/buffers/atomics state
This just adds the compute paths to state handling for the
main objects

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:31:24 +00:00
Dave Airlie
84feb6c24a r600: handle compute null key shader state
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:31:13 +00:00
Dave Airlie
9b8b78b457 r600: add some missing cayman register defines
These are just taken from the kernel, and were seen in some fglrx dumps.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:09:43 +00:00
Dave Airlie
3a403a9797 r600: don't set EOP on pop or loop end
This appears to bad, compute shaders hang without it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:09:33 +00:00
Dave Airlie
2fdc21bcab r600/ssbo: refactor out buffer coord calcs and use for atomic path.
The atomic rat path has a bug in the ssbo path, refactor out the
address calcs from the load/store paths and reuse to fix the bug
in the buffer rat atomic path.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:07:08 +00:00
Dave Airlie
a256506b76 r600/ssbo: fix multi-dword buffer loads.
This fixes loading from different channels.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:07:08 +00:00
Dave Airlie
989697eccc r600/ssbo: use r32ui format for ssbo resources.
This works best for returning the correct values and sizes in
tests.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:07:08 +00:00
Dave Airlie
275293b2b4 r600: refactor out the immediate setup code.
This just refactors the same code out of the images/buffers paths.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:07:07 +00:00
Dave Airlie
df21cd5248 r600/shader: fix ssbo atomic operations formats.
Don't try and use the image format for ssbo, just 32-bit uint.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:07:07 +00:00
Dave Airlie
4ee2b7c452 r600/shader: fix thread id loading.
This just changes how thread id loading is done, it makes
smaller shaders if we don't use thread id gprs.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 20:07:07 +00:00
Marek Olšák
dbad0acfaf gallium/u_upload_mgr: allow drivers to specify pipe_resource::flags
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-05 13:30:35 +01:00
Marek Olšák
c7f84f6513 winsys/amdgpu: add RADEON_FLAG_READ_ONLY
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-05 13:30:34 +01:00
Marek Olšák
cccf09677f gallium/radeon: remove RADEON_HEAP_VRAM_GTT
Only winsyses can set VRAM|GTT. Drivers shouldn't if they want to use
winsys allocators.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-05 13:30:34 +01:00
Marek Olšák
9ac5504df5 gallium/radeon: move setting VRAM|GTT into winsyses
The combined VRAM|GTT heap will be removed.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-05 13:30:34 +01:00
Marek Olšák
5e805cc74b radeonsi: flush the context after resource_copy_region for buffer exports
Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-05 13:28:00 +01:00
Mauro Rossi
cd8554502e Android: gallium/radeon: fix libmesa_amd_common dependency
libmesa_amd_common static dependency is added in Android build
to avoid the following building errors:

In file included from external/mesa/src/gallium/drivers/radeon/r600_buffer_common.c:24:
In file included from external/mesa/src/gallium/drivers/radeonsi/si_pipe.h:26:
external/mesa/src/gallium/drivers/radeonsi/si_shader.h:138:10: fatal error: 'ac_binary.h' file not found
         ^~~~~~~~~~~~~
1 error generated.
...
In file included from external/mesa/src/gallium/drivers/radeon/r600_gpu_load.c:34:
In file included from external/mesa/src/gallium/drivers/radeonsi/si_pipe.h:26:
external/mesa/src/gallium/drivers/radeonsi/si_shader.h:138:10: fatal error: 'ac_binary.h' file not found
         ^~~~~~~~~~~~~
1 error generated.

Fixes: 950221f923 ("radeonsi: remove r600_common_screen")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-12-05 12:05:21 +00:00
Dave Airlie
05f594f229 r600/atomic: add cayman version of atomic save/restore from GDS (v2)
On Cayman we don't use the append/consume counters (fglrx doesn't)
and they don't seem to work well with compute shaders.

This just uses GDS instead to do the atomic operations.

v1.1: remove unused line.
v2: use EOS on cayman, it appears to work.

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 10:38:07 +00:00
Dave Airlie
cf6d3caee2 r600/atomic: refactor out evergreen atomic setup/save code.
For cayman we want to use different code paths.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-05 10:38:04 +00:00
Timothy Arceri
e9e6476ae5 radeonsi: pass llvm type directly to buffer_load()
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-05 15:15:36 +11:00
Dylan Baker
6b4c7047d5 meson: build gallium nine state_tracker
v2: - set d3d_drivers_path instead of dri_drivers_path
    - Fix nine guard to check for all relavent gallium drivers
    - Link with libswdri and libswkmsdri when necessary
    - Fix pkg-config generation
    - Add missing comma

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:36:58 -08:00
Dylan Baker
0ba909f0f1 meson: build gallium xa state tracker
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:36:56 -08:00
Dylan Baker
5a785d51a6 meson: build gallium va state tracker
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:36:53 -08:00
Dylan Baker
1d36dc674d meson: build gallium omx state tracker
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:36:51 -08:00
Dylan Baker
22a817af8a meson: build gallium xvmc state tracker
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:36:48 -08:00
Dylan Baker
68076b8747 meson: build gallium vdpau state tracker
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:36:38 -08:00
Dylan Baker
b065de05c6 meson: Add osmesa.sym script as a link dependency (gallium-osmesa)
v2: - Add this patch

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:36:19 -08:00
Dylan Baker
0cb6d69a72 meson: use driver_deps for gallium osmesa
v2: - Put driver_swrast in the correct field (dependencies)
    - Remove unused osmesa_deps

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:36:10 -08:00
Dylan Baker
60283769ec meson: Use driver dependencies for libgl-xlib target
v2: - put driver_swrast in the right field
    - add dep_threads (dep_llvm requires threads, so it masked this
      previously)

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:35:48 -08:00
Dylan Baker
95a791f63e meson: use the driver dependencies for the gallium dri target
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:35:43 -08:00
Dylan Baker
0bbecc5a85 meson: define driver dependencies
This allow us to encapsulate the compiler and linkage requirements of
each driver in a reusable way. The result will be that each target that
needs a specific driver can simply add `driver_<name>` to its
dependencies line and the necessary libraries and compiler args will be
added. This will allow for a lot of code de-duplication between gallium
targets.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:35:36 -08:00
Dylan Baker
831d2fb012 meson: sort gallium drivers after winsys
This is a requirement of the next patch. Since meson does not have
forward declarations, and we're going to define the driver dependencies
in the drivers folder they need to be after the winsys so that the
winsys libs are defined first.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:35:31 -08:00
Dylan Baker
383cdaf990 meson: Combine gallium target subdirs
So that state trackers, targets, and special winsys requirements are all
in a single if statement. This is a cosmetic only cleanup with no
functional changes.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-12-04 14:35:03 -08:00
Rob Clark
1ec1ae47f7 freedreno: mark stencil buffer valid too in case of z32x24s8
The separate stencil buffer was not also getting marked as valid if
written by a draw/clear, resulting in gmem2mem getting skipped.  Move
this into fd_batch_resource_used() which also handles the separate
stencil case.

Also fix restore_buffers typo.

Fixes: 4ab6ab8036 freedreno: avoid mem2gmem for invalidated buffers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-04 11:50:45 -05:00
Rob Clark
e90f1a26c3 freedreno: remove use of u_transfer
Freedreno doesn't treat buffers and images differently, so it's use was
kind of pointless.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-04 11:50:45 -05:00
Eric Engestrom
7c3f958d23 freedreno: add -Wno-packed-bitfield-compat for meson build
Otherwise huge amount of spam from instr-a2xx.h.. gcc has no way to know
that freedreno was never built with such an old gcc version to care
about the bugs in old gcc ;-)

Reported-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
[added commit message]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-04 11:50:45 -05:00
Pierre Moreau
9bee12160b nvc0/ir: Properly lower 64-bit shifts when the shift value is >32
Fixes: 61d7676df7 "nvc0/ir: add support for 64-bit shift lowering on SM20/SM30"

Fixes fs-shift-scalar-by-scalar.shader_test from piglit for the current
set-up:

uniform int64_t ival -0x7dfcfefbdf6536ff # bit pattern: 0x82030104209ac901
uniform uint64_t uval 0x1400000085010203
uniform int shl 36
uniform int shr 36
uniform int64_t iexpected_shl 0x09ac901000000000
uniform int64_t iexpected_shr -0x7dfcff0 # bit pattern: 0xfffffffff8203010
uniform uint64_t uexpected_shl 0x5010203000000000
uniform uint64_t uexpected_shr 0x0000000001400000
draw rect ortho 12 0 4 4

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-12-04 01:03:47 -05:00
Timothy Arceri
27888977c1 st/glsl_to_nir/radeonsi: enable gs support for nir backend
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:19 +11:00
Timothy Arceri
ccd1810bba ac: add si_nir_load_input_gs() to the abi
V2: make use of driver_location and don't expose NIR to the ABI.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:19 +11:00
Timothy Arceri
4184e7c417 radeonsi: create si_llvm_load_input_gs()
This creates a common function that can be shared by the tgsi
and nir backends.

v2: use LLVMBuildBitCast() directly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
c4c8df94bd radeonsi: pass llvm type to lds_load()
v2: use LLVMBuildBitCast() directly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
650126f3e0 radeonsi: add llvm_type_is_64bit() helper
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
7ef1e42c14 radeonsi: pass llvm type to si_llvm_emit_fetch_64bit()
v2: use LLVMBuildBitCast() directly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
e51ecbe980 radeonsi: add nir support for gs epilogue
v2: add emit_gs_epilogue() helper function to reduce duplication.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
73918b3172 radeonsi: add nir support for es epilogue
v2: make use of existing si_tgsi_emit_epilogue()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
204f547852 radeonsi: add nir support for ls epilogue
v2: make use of existing si_tgsi_emit_epilogue()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
6648bd68fd st/glsl_to_nir: enable NIR link time opts
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
c16a0e11d3 radeonsi/nir: add support for packed inputs
Because NIR can create non vec4 variables when implementing component
packing we need to make sure not to reprocess the same slot again.

Also we can drop the fs_attr_idx counter and just use driver_location.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Rob Clark
11efe42a73 freedreno/ir3: relax barriers
Instructions with no barrier_class can move wrt. an EVERYTHING barrier.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
48eef0c182 freedreno/ir3: all mem instructions have WAR hazzard
It isn't just load instructions that have write-after-read hazzard.

Fixes stk gaussian blur compute shaders.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
e6c6495d3a freedreno: add debug option to force emulated indirect
Useful mostly for debugging indirect draw.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00