Commit graph

13 commits

Author SHA1 Message Date
Ian Romanick
02f9bbf6f3 intel/compiler: Add basic CFG validation
v2: Use _mesa_shader_stage_to_abbrev(stage) instead of
stage_abbrev. Noticed by Caio and GCC. That's what I get for not
recompiling after rebasing. Wrap cfg_t::validate in NDEBUG
magic. Suggested by Caio.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25216>
2023-11-30 20:58:05 +00:00
Caio Oliveira
b91ed68fa0 intel/compiler: Don't emit calls to validate() in release build
While the fs_visitor::validate() implementation is empty in release
build, we still emit calls to it since it is defined in a separate
compilation unit than its callers.  To fix this, just expose an inline
empty function in the header for the release mode.

Fossil run time differences in TGL laptop (difference at 95.0% confidence):

```
Rise of The Tomb Rider (Native) [n=7]
        -0.482857 +/- 0.010932
        -1.60608% +/- 0.0363621%

Cyberpunk 2077 (DXVK) [n=7]
        -0.987143 +/- 0.0904516
        -0.82996% +/- 0.076049%

Batman Arkham City (DXVK) [n=7]
        -7.74857 +/- 0.329561
        -1.46298% +/- 0.0622231%
```

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25847>
2023-10-24 21:10:35 +00:00
Francisco Jerez
53d1d793cb intel/fs: Delete manual 'inst->mlen' calculations from all uses of logical URB writes.
Rework:
 * Marcin: update emit_urb_indirect_vec4_write

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
2023-09-27 23:57:25 +00:00
Caio Oliveira
c487ba26ca intel/compiler: Don't store stage name and abbrev
Those are used in the failure paths and are easily retriavable from the
stage itself, so no need to store them.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25367>
2023-09-26 18:12:53 -07:00
Tapani Pälli
12d7aaf2b8 intel/compiler: add more validation for acc register usage
This is described in Wa_14014617373 and a programming note has
been added to specification.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23682>
2023-06-21 08:15:59 +00:00
Lionel Landwerlin
bc08f43991 intel/fs: add MOV source count validation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21782>
2023-03-14 10:38:50 +00:00
Jason Ekstrand
9c658b1fc8 intel/fs/validate: Assert SEND [extended] descriptors are uniform
This is required by code-gen since it generates a 1-wide OR and it'll
blow up if the register width > 1.  It's also way better than the "your
register is the wrong size" assert you get from the more generic
validation check.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
2023-02-06 09:12:18 +00:00
Ian Romanick
3b579a2ea8 intel/compiler: Validate 3-source instruction source strides
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20527>
2023-01-09 19:15:19 +00:00
Ian Romanick
c5684019f6 intel/compiler: Validate 3-source instruction sources have same base type
This can't be checked in EU validation because the bits to describe the
base type of the individual sources no longer exist.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20527>
2023-01-09 19:15:19 +00:00
Caio Oliveira
631b5742d1 intel/compiler: Print more details when fs_visitor::validate() fails
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18150>
2022-08-22 18:58:55 +00:00
Ian Romanick
349a040f68 intel/fs: Make logical URB write instructions more like other logical instructions
The changes to fs_visitor::validate() helped track down a place where I
initially forgot to convert a message to the new sources layout.  This
had caused a different validation failure in
dEQP-GLES31.functional.tessellation.tesscoord.triangles_equal_spacing,
but this were not detected until after SENDs were lowered.

Tiger Lake, Ice Lake, and Skylake had similar results. (Ice Lake shown)
total instructions in shared programs: 19951145 -> 19951133 (<.01%)
instructions in affected programs: 2429 -> 2417 (-0.49%)
helped: 8 / HURT: 0

total cycles in shared programs: 858904152 -> 858862331 (<.01%)
cycles in affected programs: 5702652 -> 5660831 (-0.73%)
helped: 2138 / HURT: 1255

Broadwell
total cycles in shared programs: 904869459 -> 904835501 (<.01%)
cycles in affected programs: 7686744 -> 7652786 (-0.44%)
helped: 2861 / HURT: 2050

Tiger Lake, Ice Lake, and Skylake had similar results. (Ice Lake shown)
Instructions in all programs: 141442369 -> 141442032 (-0.0%)
Instructions helped: 337

Cycles in all programs: 9099270231 -> 9099036492 (-0.0%)
Cycles helped: 40661
Cycles hurt: 28606

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17605>
2022-07-26 17:25:18 +00:00
Kenneth Graunke
8f8111646c intel: disable FS IR validation in release mode.
We probably don't need to iterate, fprintf, and abort in release mode.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2018-10-15 18:10:27 -07:00
Jason Ekstrand
700bebb958 i965: Move the back-end compiler to src/intel/compiler
Mostly a dummy git mv with a couple of noticable parts:
 - With the earlier header cleanups, nothing in src/intel depends
files from src/mesa/drivers/dri/i965/
 - Both Autoconf and Android builds are addressed. Thanks to Mauro and
Tapani for the fixups in the latter
 - brw_util.[ch] is not really compiler specific, so it's moved to i965.

v2:
 - move brw_eu_defines.h instead of brw_defines.h
 - remove no-longer applicable includes
 - add missing vulkan/ prefix in the Android build (thanks Tapani)

v3:
 - don't list brw_defines.h in src/intel/Makefile.sources (Jason)
 - rebase on top of the oa patches

[Emil Velikov: commit message, various small fixes througout]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-13 11:16:34 +00:00
Renamed from src/mesa/drivers/dri/i965/brw_fs_validate.cpp (Browse further)